Merge "ARM: dts: qcom: add audio device tree source files" (a7532318) · Commits · e / devices / android_kernel_fairphone_FP5

bindings/sound/wcd_codec.txt

+124 −0

Original line number	Diff line number	Diff line
		@@ -68,6 +68,11 @@ Optional properties:
		This property is required if qcom,va-clk-mux-select is provided
		- qcom,disable-afe-wakeup-event-listener : If enabled wakeup event listener
		will not be called from VA macro.
		- compatible = "qcom,swr-mstr";
		- Child of VA macro represent VA SWR master.
		- qcom,swrm-hctl-reg: HW_CTL and CLK_ENABLE bits of SWR module.
		Need Disable HW_CTL bit(to gate HW control)
		for particular Soundwire master version as SW workaround.

		Example:

		@@ -84,6 +89,13 @@ Example:
		qcom,va-dmic-sample-rate = <4800000>;
		qcom,va-clk-mux-select = <1>;
		qcom,va-island-mode-muxsel = <0x033A0000>;
		swr0: va_swr_master {
		compatible = "qcom,swr-mstr";
		qcom,swrm-hctl-reg = <0x0a7ec100>;
		rouleur_tx_slave: rouleur-tx-slave {
		compatible = "qcom,rouleur-slave";
		};
		};
		};
		};

		@@ -120,6 +132,9 @@ Example:
		wcd938x_rx_slave: wcd938x-rx-slave {
		compatible = "qcom,wcd938x-slave";
		};
		rouleur_rx_slave: rouleur-rx-slave {
		compatible = "qcom,rouleur-slave";
		};
		};
		};
		};
		@@ -478,3 +493,112 @@ swr_dmic_01: dmic_swr@58350220 {
		qcom,swr-dmic-supply = "MIC BIAS1 Standalone";
		qcom,wcd-handle = <&wcd938x_codec>;
		};

		PM2250 SPMI node

		pm2250_spmi: Child node of SPMI bus required for rouleur codec
		in order to access SPMI register to reset the peripheral.

		Required properties:
		-compatible: "qcom,pm2250-spmi";

		&spmi_bus {
		pm2250_cdc: qcom,pm2250-cdc {
		compatible = "qcom,pm2250-spmi";
		};
		};


		Rouleur Codec

		Required properties:
		- compatible: "qcom,rouleur-codec";
		- qcom,split-codec: Property to check on split codec support.
		- qcom,rx_swr_ch_map: mapping of swr rx slave port configuration to port_type and also
		corresponding master port type it need to attach.
		format: <port_id, slave_port_type, ch_mask, ch_rate, master_port_type>
		same port_id configurations have to be grouped, and in ascending order.
		- qcom,tx_swr_ch_map: mapping of swr tx slave port configuration to port_type and also
		corresponding master port type it need to attach.
		format: <port_id,slave_port_type, ch_mask, ch_rate, master_port_type>
		same port_id configurations have to be grouped, and in ascending order.
		- qcom,pmic-spmi-node: Phandle reference to the PMIC SPMI DT node.
		- qcom,wcd-reset-reg: Reset register address in PMIC for rouleur codec.
		- qcom,rx-slave: phandle reference of Soundwire Rx slave device.
		- qcom,tx-slave: phandle reference of Soundwire Tx slave device.

		Optional properties:

		- cdc-pa-vpos-supply: phandle of pa vpos supply's regulator device tree node.
		- qcom,cdc-pa-vpos-voltage: pa vpos supply's voltage level min and max in mV.
		- qcom,cdc-pa-vpos-current: pa vpos supply's max current in mA.

		- cdc-vdd-io-supply: phandle of io supply's regulator device tree node.
		- qcom,cdc-vdd-io-voltage: io supply's voltage level min and max in mV.
		- qcom,cdc-vdd-io-current: io supply's max current in mA.

		- cdc-vdd-cp-supply: phandle of vdd cp supply's regulator device tree node.
		- qcom,cdc-vdd-cp-voltage: vdd cp supply's voltage level min and max in mV.
		- qcom,cdc-vdd-cp-current: vdd cp supply's max current in mA.

		- cdc-vdd-mic-bias-supply: phandle of mic bias supply's regulator device tree node.
		- qcom,cdc-vdd-mic-bias-voltage: mic bias supply's voltage level min and max in mV.
		- qcom,cdc-vdd-mic-bias-current: mic bias supply's max current in mA.
		- qcom,cdc-vdd-mic-bias-lpm-supported: mic bias supply's LPM mode.

		- qcom,cdc-static-supplies: List of supplies to be enabled prior to codec
		hardware probe. Supplies in this list will be
		stay enabled.

		- qcom,cdc-on-demand-supplies: List of supplies which can be enabled
		dynamically.
		Supplies in this list are off by default.

		Example:

		rouleur_codec: rouleur-codec {
		compatible = "qcom,rouleur-codec";
		qcom,split-codec = <1>;
		qcom,pmic-spmi-node = <&pm2250_cdc>;
		qcom,wcd-reset-reg = <0x0000F3DB>;
		qcom,rx_swr_ch_map = <0 HPH_L 0x1 0 HPH_L>,
		<0 HPH_R 0x2 0 HPH_R>, <1 CLSH 0x1 0 CLSH>,
		<2 COMP_L 0x1 0 COMP_L>, <2 COMP_R 0x2 0 COMP_R>,
		<3 LO 0x1 0 LO>, <4 DSD_L 0x1 0 DSD_L>,
		<4 DSD_R 0x2 0 DSD_R>;
		qcom,tx_swr_ch_map = <0 ADC1 0x1 0 ADC1>,
		<0 ADC2 0x2 0 ADC2>, <0 DMIC0 0x4 0 ADC3>,
		<0 MBHC 0x8 0 ADC4>, <1 DMIC0 0x1 0 DMIC0>,
		<1 DMIC1 0x2 0 DMIC1>, <1 ADC1 0x4 0 DMIC2>,
		<1 MBHC 0x8 0 DMIC3>;

		qcom,rx-slave = <&rouleur_rx_slave>;
		qcom,tx-slave = <&rouleur_tx_slave>;

		cdc-vdd-io-supply = <&L15A>;
		qcom,cdc-vdd-io-voltage = <1800000 1800000>;
		qcom,cdc-vdd-io-current = <10000>;

		cdc-vdd-cp-supply = <&S4A>;
		qcom,cdc-vdd-cp-voltage = <2040000 2040000>;
		qcom,cdc-vdd-cp-current = <300000>;

		cdc-pa-vpos-supply = <&S4A>;
		qcom,cdc-pa-vpos-voltage = <2040000 2040000>;
		qcom,cdc-pa-vpos-current = <2400000>;

		cdc-vdd-mic-bias-supply = <&L22A>;
		qcom,cdc-vdd-mic-bias-voltage = <3304000 3304000>;
		qcom,cdc-vdd-mic-bias-current = <50000>;
		qcom,cdc-vdd-mic-bias-lpm-supported = <1>;

		qcom,cdc-micbias1-mv = <1800>;
		qcom,cdc-micbias2-mv = <1800>;
		qcom,cdc-micbias3-mv = <1800>;

		qcom,cdc-static-supplies = "cdc-vdd-cp",
		"cdc-vdd-io",
		"cdc-vdd-mic-bias";
		qcom,cdc-on-demand-supplies = "cdc-pa-vpos";
		};
		};

qcom/pm2250.dtsi

+4 −0

Original line number	Diff line number	Diff line
		@@ -170,6 +170,10 @@
		interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>;
		};

		pm2250_cdc: qcom,pm2250-cdc {
		compatible = "qcom,pm2250-spmi";
		};

		pm2250_qg: qpnp,qg {
		compatible = "qcom,qpnp-qg-lite";
		#address-cells = <1>;

qcom/scuba-audio-overlay.dtsi

0 → 100644

+309 −0

Original line number	Diff line number	Diff line
		#include <dt-bindings/clock/qcom,audio-ext-clk.h>
		#include <dt-bindings/sound/qcom,bolero-clk-rsc.h>
		#include <dt-bindings/sound/audio-codec-port-types.h>
		#include <dt-bindings/interrupt-controller/arm-gic.h>

		&bolero {
		qcom,num-macros = <3>;
		qcom,bolero-version = <5>;
		bolero-clk-rsc-mngr {
		compatible = "qcom,bolero-clk-rsc-mngr";
		qcom,fs-gen-sequence = <0x3000 0x1 0x1>, <0x3004 0x3 0x3>,
		<0x3004 0x3 0x1>, <0x3080 0x2 0x2>;
		qcom,rx_mclk_mode_muxsel = <0x0a5640d8>;
		qcom,va_mclk_mode_muxsel = <0x0a7a0000>;
		clock-names = "tx_core_clk", "tx_npl_clk", "rx_core_clk", "rx_npl_clk",
		"va_core_clk", "va_npl_clk";
		clocks = <&clock_audio_tx_1 0>, <&clock_audio_tx_2 0>,
		<&clock_audio_rx_1 0>, <&clock_audio_rx_2 0>,
		<&clock_audio_va_1 0>, <&clock_audio_va_2 0>;
		};

		tx_macro: tx-macro@0a620000 {
		compatible = "qcom,tx-macro";
		reg = <0x0a620000 0x0>;
		clock-names = "tx_core_clk", "tx_npl_clk";
		clocks = <&clock_audio_tx_1 0>,
		<&clock_audio_tx_2 0>;
		qcom,tx-dmic-sample-rate = <2400000>;
		qcom,is-used-swr-gpio = <0>;
		};

		rx_macro: rx-macro@0a600000 {
		compatible = "qcom,rx-macro";
		reg = <0x0a600000 0x0>;
		clock-names = "rx_core_clk", "rx_npl_clk";
		clocks = <&clock_audio_rx_1 0>,
		<&clock_audio_rx_2 0>;
		qcom,rx-swr-gpios = <&rx_swr_gpios>;
		qcom,rx_mclk_mode_muxsel = <0x0a5640d8>;
		qcom,rx-bcl-pmic-params = /bits/ 8 <0x00 0x04 0x3E>;
		qcom,default-clk-id = <TX_CORE_CLK>;
		swr1: rx_swr_master {
		compatible = "qcom,swr-mstr";
		#address-cells = <2>;
		#size-cells = <0>;
		clock-names = "lpass_audio_hw_vote";
		clocks = <&lpass_audio_hw_vote 0>;
		qcom,swr_master_id = <2>;
		qcom,swrm-hctl-reg = <0x0a6a9098>;
		qcom,mipi-sdw-block-packing-mode = <1>;
		swrm-io-base = <0x0a610000 0x0>;
		interrupts = <0 297 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-names = "swr_master_irq";
		qcom,swr-num-ports = <5>;
		qcom,disable-div2-clk-switch = <1>;
		qcom,swr-port-mapping = <1 HPH_L 0x1>,
		<1 HPH_R 0x2>, <2 CLSH 0x1>,
		<3 COMP_L 0x1>, <3 COMP_R 0x2>,
		<4 LO 0x1>, <5 DSD_L 0x1>,
		<5 DSD_R 0x2>;
		qcom,swr-num-dev = <1>;
		qcom,swr-clock-stop-mode0 = <1>;
		rouleur_rx_slave: rouleur-rx-slave {
		compatible = "qcom,rouleur-slave";
		reg = <0x0C 0x01170224>;
		};
		};
		};

		va_macro: va-macro@0a730000 {
		compatible = "qcom,va-macro";
		reg = <0x0a730000 0x0>;
		clock-names = "lpass_audio_hw_vote";
		clocks = <&lpass_audio_hw_vote 0>;
		qcom,va-dmic-sample-rate = <600000>;
		qcom,va-clk-mux-select = <1>;
		qcom,va-island-mode-muxsel = <0x0a7a0000>;
		qcom,default-clk-id = <TX_CORE_CLK>;
		qcom,is-used-swr-gpio = <1>;
		qcom,va-swr-gpios = <&va_swr_gpios>;
		swr0: va_swr_master {
		compatible = "qcom,swr-mstr";
		#address-cells = <2>;
		#size-cells = <0>;
		clock-names = "lpass_audio_hw_vote";
		clocks = <&lpass_audio_hw_vote 0>;
		qcom,swr_master_id = <3>;
		qcom,swrm-hctl-reg = <0x0a7ec100>;
		qcom,mipi-sdw-block-packing-mode = <1>;
		swrm-io-base = <0x0a740000 0x0>;
		interrupts =
		<0 296 IRQ_TYPE_LEVEL_HIGH>,
		<0 79 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-names = "swr_master_irq", "swr_wake_irq";
		qcom,swr-wakeup-required = <1>;
		qcom,swr-num-ports = <3>;
		qcom,swr-port-mapping = <1 ADC1 0x1>, <1 ADC2 0x2>,
		<1 ADC3 0x4>, <1 ADC4 0x8>,
		<2 DMIC0 0x1>, <2 DMIC1 0x2>,
		<2 DMIC2 0x4>, <2 DMIC3 0x8>,
		<3 DMIC4 0x1>, <3 DMIC5 0x2>,
		<3 DMIC6 0x4>, <3 DMIC7 0x8>;
		qcom,swr-num-dev = <1>;
		qcom,swr-clock-stop-mode0 = <1>;
		qcom,swr-mstr-irq-wakeup-capable = <1>;
		rouleur_tx_slave: rouleur-tx-slave {
		compatible = "qcom,rouleur-slave";
		reg = <0x0C 0x01170223>;
		};
		};
		};

		rouleur_codec: rouleur-codec {
		compatible = "qcom,rouleur-codec";
		qcom,split-codec = <1>;
		qcom,pmic-spmi-node = <&pm2250_cdc>;
		qcom,wcd-reset-reg = <0x0000F3DB>;
		qcom,foundry-id-reg = <0x0000704D>;
		qcom,rx_swr_ch_map = <0 HPH_L 0x1 0 HPH_L>,
		<0 HPH_R 0x2 0 HPH_R>,
		<1 COMP_L 0x1 0 COMP_L>, <1 COMP_R 0x2 0 COMP_R>;
		qcom,tx_swr_ch_map = <0 ADC1 0x1 0 ADC1>,
		<0 ADC2 0x2 0 ADC2>, <0 DMIC0 0x4 0 ADC3>,
		<0 MBHC 0x8 0 ADC4>, <1 DMIC0 0x1 0 DMIC0>,
		<1 DMIC1 0x2 0 DMIC1>, <1 ADC1 0x4 0 DMIC2>,
		<1 MBHC 0x8 0 DMIC3>;

		qcom,rx-slave = <&rouleur_rx_slave>;
		qcom,tx-slave = <&rouleur_tx_slave>;

		cdc-vdd-io-supply = <&L15A>;
		qcom,cdc-vdd-io-voltage = <1800000 1800000>;
		qcom,cdc-vdd-io-current = <10000>;

		cdc-vdd-cp-supply = <&S4A>;
		qcom,cdc-vdd-cp-voltage = <2040000 2040000>;
		qcom,cdc-vdd-cp-current = <300000>;

		cdc-pa-vpos-supply = <&S4A>;
		qcom,cdc-pa-vpos-voltage = <2040000 2040000>;
		qcom,cdc-pa-vpos-current = <2400000>;

		cdc-vdd-mic-bias-supply = <&L22A>;
		qcom,cdc-vdd-mic-bias-voltage = <3000000 3304000>;
		qcom,cdc-vdd-mic-bias-current = <50000>;
		qcom,cdc-vdd-mic-bias-lpm-supported = <1>;

		qcom,cdc-micbias1-mv = <1800>;
		qcom,cdc-micbias2-mv = <1800>;
		qcom,cdc-micbias3-mv = <1800>;

		qcom,cdc-static-supplies = "cdc-vdd-cp",
		"cdc-vdd-io",
		"cdc-vdd-mic-bias";
		qcom,cdc-on-demand-supplies = "cdc-pa-vpos";
		};
		};

		&scuba_snd {
		qcom,model = "bengal-scubaidp-snd-card";
		qcom,msm-mi2s-master = <1>, <1>, <1>, <1>;
		qcom,wcn-btfm = <1>;
		qcom,va-bolero-codec = <1>;
		qcom,audio-routing =
		"AMIC1", "Analog Mic1",
		"Analog Mic1","MIC BIAS1",
		"AMIC2", "Analog Mic2",
		"Analog Mic2", "MIC BIAS2",
		"AMIC3", "Analog Mic3",
		"Analog Mic3", "MIC BIAS3",
		"TX DMIC0", "Digital Mic0",
		"Digital Mic0", "MIC BIAS3",
		"TX DMIC1", "Digital Mic1",
		"Digital Mic1", "MIC BIAS3",
		"TX DMIC2", "Digital Mic2",
		"Digital Mic2", "MIC BIAS1",
		"TX DMIC3", "Digital Mic3",
		"Digital Mic3", "MIC BIAS1",
		"IN1_HPHL", "HPHL_OUT",
		"IN2_HPHR", "HPHR_OUT",
		"SpkrMono WSA_IN", "LO",
		"TX SWR_INPUT", "VA_TX_SWR_CLK",
		"TX SWR_INPUT", "ADC1_OUTPUT",
		"TX SWR_INPUT", "ADC2_OUTPUT",
		"RX_TX DEC0_INP", "TX DEC0 MUX",
		"RX_TX DEC1_INP", "TX DEC1 MUX",
		"RX_TX DEC2_INP", "TX DEC2 MUX",
		"RX_TX DEC3_INP", "TX DEC3 MUX",
		"TX_AIF1 CAP", "VA_TX_SWR_CLK",
		"TX_AIF2 CAP", "VA_TX_SWR_CLK",
		"TX_AIF3 CAP", "VA_TX_SWR_CLK",
		"VA SWR_INPUT", "VA_SWR_CLK",
		"VA_AIF1 CAP", "VA_SWR_CLK",
		"VA_AIF2 CAP", "VA_SWR_CLK",
		"VA_AIF3 CAP", "VA_SWR_CLK",
		"VA DMIC0", "Digital Mic0",
		"VA DMIC1", "Digital Mic1",
		"VA DMIC2", "Digital Mic2",
		"VA DMIC3", "Digital Mic3",
		"VA DMIC0", "VA MIC BIAS3",
		"VA DMIC1", "VA MIC BIAS3",
		"VA DMIC2", "VA MIC BIAS1",
		"VA DMIC3", "VA MIC BIAS1",
		"VA SWR_INPUT", "ADC1_OUTPUT",
		"VA SWR_INPUT", "ADC2_OUTPUT";

		qcom,msm-mbhc-hphl-swh = <1>;
		qcom,msm-mbhc-gnd-swh = <1>;
		qcom,cdc-dmic01-gpios = <&cdc_dmic01_gpios>;
		qcom,cdc-dmic23-gpios = <&cdc_dmic23_gpios>;

		nvmem-cells = <&adsp_variant>;
		nvmem-cell-names = "adsp_variant";
		asoc-codec = <&stub_codec>, <&bolero>,
		<&rouleur_codec>, <&wsa881x_i2c_e>;
		asoc-codec-names = "msm-stub-codec.1", "bolero_codec",
		"rouleur_codec", "wsa-codec0";
		qcom,wsa-max-devs = <1>;
		qcom,wsa-devs = <&wsa881x_i2c_e>;
		qcom,wsa-aux-dev-prefix = "SpkrMono";
		qcom,codec-max-aux-devs = <0>;
		qcom,msm_audio_ssr_devs = <&audio_gpr>, <&bolero>, <&lpi_tlmm>;
		};

		&qupv3_se1_i2c {
		wsa881x_i2c_e: wsa881x-i2c-codec@e {
		compatible = "qcom,wsa881x-i2c-codec";
		reg = <0x0e>;
		clock-names = "wsa_mclk";
		clocks = <&wsa881x_analog_clk 0>;
		qcom,wsa-analog-clk-gpio = <&wsa881x_analog_clk_gpio>;
		qcom,wsa-analog-reset-gpio = <&wsa881x_analog_reset_gpio>;
		qcom,wsa-prefix = "SpkrMono";
		};

		wsa881x_i2c_44: wsa881x-i2c-codec@44 {
		compatible = "qcom,wsa881x-i2c-codec";
		reg = <0x044>;
		};
		};

		&soc {
		wsa881x_analog_reset_gpio: msm_cdc_pinctrl@106 {
		compatible = "qcom,msm-cdc-pinctrl";
		pinctrl-names = "aud_active", "aud_sleep";
		pinctrl-0 = <&spkr_1_sd_n_active>;
		pinctrl-1 = <&spkr_1_sd_n_sleep>;
		};

		wsa881x_analog_clk: wsa_ana_clk {
		compatible = "qcom,audio-ref-clk";
		qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_2>;
		qcom,codec-lpass-ext-clk-freq = <9600000>;
		qcom,codec-lpass-clk-id = <0x301>;
		#clock-cells = <1>;
		};

		clock_audio_rx_1: rx_core_clk {
		compatible = "qcom,audio-ref-clk";
		qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_4>;
		qcom,codec-lpass-ext-clk-freq = <22579200>;
		qcom,codec-lpass-clk-id = <0x30E>;
		#clock-cells = <1>;
		};

		clock_audio_rx_2: rx_npl_clk {
		compatible = "qcom,audio-ref-clk";
		qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_5>;
		qcom,codec-lpass-ext-clk-freq = <22579200>;
		qcom,codec-lpass-clk-id = <0x30F>;
		#clock-cells = <1>;
		};

		clock_audio_tx_1: tx_core_clk {
		compatible = "qcom,audio-ref-clk";
		qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_6>;
		qcom,codec-lpass-ext-clk-freq = <19200000>;
		qcom,codec-lpass-clk-id = <0x30C>;
		#clock-cells = <1>;
		};

		clock_audio_tx_2: tx_npl_clk {
		compatible = "qcom,audio-ref-clk";
		qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_7>;
		qcom,codec-lpass-ext-clk-freq = <19200000>;
		qcom,codec-lpass-clk-id = <0x30D>;
		#clock-cells = <1>;
		};

		clock_audio_va_1: va_core_clk {
		compatible = "qcom,audio-ref-clk";
		qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK>;
		qcom,codec-lpass-ext-clk-freq = <19200000>;
		qcom,codec-lpass-clk-id = <0x307>;
		#clock-cells = <1>;
		};

		clock_audio_va_2: va_npl_clk {
		compatible = "qcom,audio-ref-clk";
		qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_8>;
		qcom,codec-lpass-ext-clk-freq = <19200000>;
		qcom,codec-lpass-clk-id = <0x308>;
		#clock-cells = <1>;
		};
		};

		&va_cdc_dma_0_tx {
		qcom,msm-dai-is-island-supported = <1>;
		};

qcom/scuba-audio.dtsi

0 → 100644

+178 −0

Original line number	Diff line number	Diff line
		#include <dt-bindings/clock/qcom,audio-ext-clk.h>
		#include "msm-audio-lpass.dtsi"

		&soc {
		spf_core_platform: spf_core_platform {
		compatible = "qcom,spf-core-platform";
		};

		audio_pkt_core_platform: qcom,audio-pkt-core-platform {
		compatible = "qcom,audio-pkt-core-platform";
		};
		};

		#include "scuba-lpi.dtsi"

		&spf_core_platform {
		cdc_dmic01_gpios: cdc_dmic01_pinctrl {
		compatible = "qcom,msm-cdc-pinctrl";
		pinctrl-names = "aud_active", "aud_sleep";
		pinctrl-0 = <&cdc_dmic01_clk_active &cdc_dmic01_data_active>;
		pinctrl-1 = <&cdc_dmic01_clk_sleep &cdc_dmic01_data_sleep>;
		qcom,lpi-gpios;
		};

		cdc_dmic23_gpios: cdc_dmic23_pinctrl {
		compatible = "qcom,msm-cdc-pinctrl";
		pinctrl-names = "aud_active", "aud_sleep";
		pinctrl-0 = <&cdc_dmic23_clk_active &cdc_dmic23_data_active>;
		pinctrl-1 = <&cdc_dmic23_clk_sleep &cdc_dmic23_data_sleep>;
		qcom,lpi-gpios;
		};

		rx_swr_gpios: rx_swr_clk_data_pinctrl {
		compatible = "qcom,msm-cdc-pinctrl";
		pinctrl-names = "aud_active", "aud_sleep";
		pinctrl-0 = <&rx_swr_clk_active &rx_swr_data_active
		&rx_swr_data1_active>;
		pinctrl-1 = <&rx_swr_clk_sleep &rx_swr_data_sleep
		&rx_swr_data1_sleep>;
		qcom,lpi-gpios;
		};

		va_swr_gpios: va_swr_clk_data_pinctrl {
		compatible = "qcom,msm-cdc-pinctrl";
		pinctrl-names = "aud_active", "aud_sleep";
		pinctrl-0 = <&tx_swr_clk_active &tx_swr_data1_active
		&tx_swr_data2_active>;
		pinctrl-1 = <&tx_swr_clk_sleep &tx_swr_data1_sleep
		&tx_swr_data2_sleep>;
		qcom,lpi-gpios;
		qcom,chip-wakeup-reg = <0x003ca064>;
		qcom,chip-wakeup-maskbit = <0>;
		qcom,chip-wakeup-default-val = <0x1>;
		};

		wsa881x_analog_clk_gpio: msm_cdc_pinctrl@18 {
		compatible = "qcom,msm-cdc-pinctrl";
		pinctrl-names = "aud_active", "aud_sleep";
		pinctrl-0 = <&wsa_mclk_active>;
		pinctrl-1 = <&wsa_mclk_sleep>;
		qcom,lpi-gpios;
		};

		bolero: bolero-cdc {
		compatible = "qcom,bolero-codec";
		clock-names = "lpass_audio_hw_vote";
		clocks = <&lpass_audio_hw_vote 0>;
		bolero-clk-rsc-mngr {
		compatible = "qcom,bolero-clk-rsc-mngr";
		};

		va_macro: va-macro@0a730000 {
		swr0: va_swr_master {
		};
		};

		rx_macro: rx-macro@0a600000 {
		swr1: rx_swr_master {
		};
		};
		};

		scuba_snd: sound {
		compatible = "qcom,bengal-asoc-snd";
		qcom,mi2s-audio-intf = <0>;
		qcom,auxpcm-audio-intf = <0>;
		qcom,tdm-audio-intf = <0>;
		qcom,wcn-btfm = <0>;
		qcom,afe-rxtx-lb = <0>;

		asoc-platform = <&pcm0>, <&pcm1>, <&pcm2>, <&voip>, <&voice>,
		<&loopback>, <&compress>, <&hostless>,
		<&afe>, <&lsm>, <&routing>, <&compr>,
		<&pcm_noirq>;
		asoc-platform-names = "msm-pcm-dsp.0", "msm-pcm-dsp.1",
		"msm-pcm-dsp.2", "msm-voip-dsp",
		"msm-pcm-voice", "msm-pcm-loopback",
		"msm-compress-dsp", "msm-pcm-hostless",
		"msm-pcm-afe", "msm-lsm-client",
		"msm-pcm-routing", "msm-compr-dsp",
		"msm-pcm-dsp-noirq";
		asoc-cpu = <&dai_mi2s0>, <&dai_mi2s1>,
		<&dai_mi2s2>, <&dai_mi2s3>,
		<&dai_pri_auxpcm>,
		<&dai_sec_auxpcm>, <&dai_tert_auxpcm>,
		<&dai_quat_auxpcm>,
		<&afe_pcm_rx>, <&afe_pcm_tx>, <&afe_proxy_rx>,
		<&afe_proxy_tx>, <&incall_record_rx>,
		<&incall_record_tx>, <&incall_music_rx>,
		<&incall_music_2_rx>,
		<&proxy_rx>, <&proxy_tx>,
		<&usb_audio_rx>, <&usb_audio_tx>,
		<&sb_7_rx>, <&sb_7_tx>, <&sb_8_tx>,
		<&dai_pri_tdm_rx_0>, <&dai_pri_tdm_tx_0>,
		<&dai_sec_tdm_rx_0>, <&dai_sec_tdm_tx_0>,
		<&dai_tert_tdm_rx_0>, <&dai_tert_tdm_tx_0>,
		<&dai_quat_tdm_rx_0>, <&dai_quat_tdm_tx_0>,
		<&va_cdc_dma_0_tx>, <&va_cdc_dma_1_tx>,
		<&va_cdc_dma_2_tx>,
		<&rx_cdc_dma_0_rx>, <&tx_cdc_dma_0_tx>,
		<&rx_cdc_dma_1_rx>, <&tx_cdc_dma_1_tx>,
		<&rx_cdc_dma_2_rx>, <&tx_cdc_dma_2_tx>,
		<&rx_cdc_dma_3_rx>, <&tx_cdc_dma_3_tx>,
		<&rx_cdc_dma_4_rx>, <&tx_cdc_dma_4_tx>,
		<&rx_cdc_dma_5_rx>, <&tx_cdc_dma_5_tx>,
		<&rx_cdc_dma_6_rx>, <&rx_cdc_dma_7_rx>,
		<&afe_loopback_tx>;
		asoc-cpu-names = "msm-dai-q6-mi2s.0", "msm-dai-q6-mi2s.1",
		"msm-dai-q6-mi2s.2", "msm-dai-q6-mi2s.3",
		"msm-dai-q6-auxpcm.1",
		"msm-dai-q6-auxpcm.2", "msm-dai-q6-auxpcm.3",
		"msm-dai-q6-auxpcm.4", "msm-dai-q6-dev.224",
		"msm-dai-q6-dev.225", "msm-dai-q6-dev.241",
		"msm-dai-q6-dev.240", "msm-dai-q6-dev.32771",
		"msm-dai-q6-dev.32772", "msm-dai-q6-dev.32773",
		"msm-dai-q6-dev.32770",
		"msm-dai-q6-dev.8194", "msm-dai-q6-dev.8195",
		"msm-dai-q6-dev.28672", "msm-dai-q6-dev.28673",
		"msm-dai-q6-dev.16398", "msm-dai-q6-dev.16399",
		"msm-dai-q6-dev.16401",
		"msm-dai-q6-tdm.36864", "msm-dai-q6-tdm.36865",
		"msm-dai-q6-tdm.36880", "msm-dai-q6-tdm.36881",
		"msm-dai-q6-tdm.36896", "msm-dai-q6-tdm.36897",
		"msm-dai-q6-tdm.36912", "msm-dai-q6-tdm.36913",
		"msm-dai-cdc-dma-dev.45089",
		"msm-dai-cdc-dma-dev.45091",
		"msm-dai-cdc-dma-dev.45093",
		"msm-dai-cdc-dma-dev.45104",
		"msm-dai-cdc-dma-dev.45105",
		"msm-dai-cdc-dma-dev.45106",
		"msm-dai-cdc-dma-dev.45107",
		"msm-dai-cdc-dma-dev.45108",
		"msm-dai-cdc-dma-dev.45109",
		"msm-dai-cdc-dma-dev.45110",
		"msm-dai-cdc-dma-dev.45111",
		"msm-dai-cdc-dma-dev.45112",
		"msm-dai-cdc-dma-dev.45113",
		"msm-dai-cdc-dma-dev.45114",
		"msm-dai-cdc-dma-dev.45115",
		"msm-dai-cdc-dma-dev.45116",
		"msm-dai-cdc-dma-dev.45118",
		"msm-dai-q6-dev.24577";
		fsa4480-i2c-handle = <&fsa4480>;
		};
		};

		&msm_audio_ion {
		iommus = <&apps_smmu 0x01c1 0x0>;
		qcom,smmu-sid-mask = /bits/ 64 <0xf>;
		};

		&qupv3_se1_i2c {
		status = "ok";
		fsa4480: fsa4480@42 {
		compatible = "qcom,fsa4480-i2c";
		reg = <0x42>;
		};
		};

qcom/scuba-iot-idp.dtsi

+1 −0

Original line number	Diff line number	Diff line
		#include <dt-bindings/gpio/gpio.h>
		#include <dt-bindings/iio/qcom,spmi-vadc.h>
		#include "scuba-ion.dtsi"
		#include "scuba-audio-overlay.dtsi"

		&soc {
		scuba_batterydata: qcom,battery-data {