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Commit a6eca2ab authored by Claudiu Beznea's avatar Claudiu Beznea Committed by Sam Ravnborg
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drm: atmel-hlcdc: add config option for clock selection 



SAM9x60 LCD Controller has no option to select clock source as previous
controllers have. To be able to use the same driver even for this LCD
controller add a config option to know if controller supports this.

Signed-off-by: default avatarClaudiu Beznea <claudiu.beznea@microchip.com>
Reviewed-by: default avatarSam Ravnborg <sam@ravnborg.org>
Signed-off-by: default avatarSam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/1556195748-11106-2-git-send-email-claudiu.beznea@microchip.com
parent 3b295cb1

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

+7 −5
Original line number Diff line number Diff line
@@ -78,7 +78,8 @@ static void atmel_hlcdc_crtc_mode_set_nofb(struct drm_crtc *c) 
	unsigned long mode_rate;

	struct videomode vm;

	unsigned long prate;

	unsigned int cfg;

	unsigned int mask = ATMEL_HLCDC_CLKDIV_MASK | ATMEL_HLCDC_CLKPOL;

	unsigned int cfg = 0;

	int div;



	vm.vfront_porch = adj->crtc_vsync_start - adj->crtc_vdisplay;
@@ -101,7 +102,10 @@ static void atmel_hlcdc_crtc_mode_set_nofb(struct drm_crtc *c) 
		     (adj->crtc_hdisplay - 1) |

		     ((adj->crtc_vdisplay - 1) << 16));



	cfg = ATMEL_HLCDC_CLKSEL;

	if (!crtc->dc->desc->fixed_clksrc) {

		cfg |= ATMEL_HLCDC_CLKSEL;

		mask |= ATMEL_HLCDC_CLKSEL;

	}



	prate = 2 * clk_get_rate(crtc->dc->hlcdc->sys_clk);

	mode_rate = adj->crtc_clock * 1000;
@@ -132,9 +136,7 @@ static void atmel_hlcdc_crtc_mode_set_nofb(struct drm_crtc *c) 


	cfg |= ATMEL_HLCDC_CLKDIV(div);



	regmap_update_bits(regmap, ATMEL_HLCDC_CFG(0),

			   ATMEL_HLCDC_CLKSEL | ATMEL_HLCDC_CLKDIV_MASK |

			   ATMEL_HLCDC_CLKPOL, cfg);

	regmap_update_bits(regmap, ATMEL_HLCDC_CFG(0), mask, cfg);



	cfg = 0;

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h

+2 −0
Original line number Diff line number Diff line
@@ -328,6 +328,7 @@ atmel_hlcdc_layer_to_plane(struct atmel_hlcdc_layer *layer) 
 * @max_hpw: maximum horizontal back/front porch width

 * @conflicting_output_formats: true if RGBXXX output formats conflict with

 *				each other.

 * @fixed_clksrc: true if clock source is fixed

 * @layers: a layer description table describing available layers

 * @nlayers: layer description table size

 */
@@ -340,6 +341,7 @@ struct atmel_hlcdc_dc_desc { 
	int max_vpw;

	int max_hpw;

	bool conflicting_output_formats;

	bool fixed_clksrc;

	const struct atmel_hlcdc_layer_desc *layers;

	int nlayers;

};