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Commit a6a40d56 authored by Anson Huang's avatar Anson Huang Committed by Shawn Guo
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arm64: dts: imx8mm: Use correct clock for usdhc's ipg clk 



On i.MX8MM, usdhc's ipg clock is from IMX8MM_CLK_IPG_ROOT,
assign it explicitly instead of using IMX8MM_CLK_DUMMY.

Fixes: a05ea40e ("arm64: dts: imx: Add i.mx8mm dtsi support")
Signed-off-by: default avatarAnson Huang <Anson.Huang@nxp.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent b0759297

arch/arm64/boot/dts/freescale/imx8mm.dtsi

+3 −3
Original line number Diff line number Diff line
@@ -694,7 +694,7 @@ 
				compatible = "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc";

				reg = <0x30b40000 0x10000>;

				interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&clk IMX8MM_CLK_DUMMY>,

				clocks = <&clk IMX8MM_CLK_IPG_ROOT>,

					 <&clk IMX8MM_CLK_NAND_USDHC_BUS>,

					 <&clk IMX8MM_CLK_USDHC1_ROOT>;

				clock-names = "ipg", "ahb", "per";
@@ -710,7 +710,7 @@ 
				compatible = "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc";

				reg = <0x30b50000 0x10000>;

				interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&clk IMX8MM_CLK_DUMMY>,

				clocks = <&clk IMX8MM_CLK_IPG_ROOT>,

					 <&clk IMX8MM_CLK_NAND_USDHC_BUS>,

					 <&clk IMX8MM_CLK_USDHC2_ROOT>;

				clock-names = "ipg", "ahb", "per";
@@ -724,7 +724,7 @@ 
				compatible = "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc";

				reg = <0x30b60000 0x10000>;

				interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&clk IMX8MM_CLK_DUMMY>,

				clocks = <&clk IMX8MM_CLK_IPG_ROOT>,

					 <&clk IMX8MM_CLK_NAND_USDHC_BUS>,

					 <&clk IMX8MM_CLK_USDHC3_ROOT>;

				clock-names = "ipg", "ahb", "per";