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Commit a68b98fe authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "msm: kgsl: Poll GDSCR to ensure CX collapse"

parents 048c65bd 9bf0dd07

drivers/gpu/msm/a6xx_reg.h

+1 −0
Original line number Diff line number Diff line
@@ -1074,6 +1074,7 @@ 
#define A6XX_GPU_CC_GX_GDSCR                   0x24403

#define A6XX_GPU_CC_GX_DOMAIN_MISC             0x24542

#define A6XX_GPU_CC_GX_DOMAIN_MISC3            0x24563

#define A6XX_GPU_CC_CX_GDSCR                   0x2441B



/* GPU CPR registers */

#define A6XX_GPU_CPR_FSM_CTL			0x26801

drivers/gpu/msm/adreno_a6xx.c

+27 −0
Original line number Diff line number Diff line
@@ -8,6 +8,7 @@ 
#include <linux/of.h>

#include <linux/of_fdt.h>

#include <linux/of_device.h>

#include <linux/regulator/consumer.h>

#include <linux/soc/qcom/llcc-qcom.h>



#include "adreno.h"
@@ -243,6 +244,32 @@ static unsigned int __get_gmu_wfi_config(struct adreno_device *adreno_dev) 
	return 0x00000000;

}



bool a6xx_cx_regulator_disable_wait(struct regulator *reg,

				struct kgsl_device *device, u32 timeout)

{

	ktime_t tout = ktime_add_us(ktime_get(), timeout * 1000);

	unsigned int val;



	if (IS_ERR_OR_NULL(reg))

		return true;



	regulator_disable(reg);



	for (;;) {

		gmu_core_regread(device, A6XX_GPU_CC_CX_GDSCR, &val);



		if (!(val & BIT(31)))

			return true;



		if (ktime_compare(ktime_get(), tout) > 0) {

			gmu_core_regread(device, A6XX_GPU_CC_CX_GDSCR, &val);

			return (!(val & BIT(31)));

		}



		usleep_range((100 >> 2) + 1, 100);

	}

}



static void a6xx_hwcg_set(struct adreno_device *adreno_dev, bool on)

{

	struct kgsl_device *device = KGSL_DEVICE(adreno_dev);

drivers/gpu/msm/adreno_a6xx.h

+14 −0
Original line number Diff line number Diff line
@@ -275,6 +275,20 @@ static inline bool a6xx_is_smmu_stalled(struct kgsl_device *device) 
	return val & BIT(24);

}



/**

 * a6xx_cx_regulator_disable_wait - Disable a cx regulator and wait for it

 * @reg: A &struct regulator handle

 * @device: kgsl device struct

 * @timeout: Time to wait (in milliseconds)

 *

 * Disable the regulator and wait @timeout milliseconds for it to enter the

 * disabled state.

 *

 * Return: True if the regulator was disabled or false if it timed out

 */

bool a6xx_cx_regulator_disable_wait(struct regulator *reg,

				struct kgsl_device *device, u32 timeout);



/* Preemption functions */

void a6xx_preemption_trigger(struct adreno_device *adreno_dev);

void a6xx_preemption_schedule(struct adreno_device *adreno_dev);

drivers/gpu/msm/adreno_a6xx_gmu.c

+4 −4
Original line number Diff line number Diff line
@@ -1806,7 +1806,7 @@ void a6xx_gmu_suspend(struct adreno_device *adreno_dev) 
	if (ADRENO_QUIRK(adreno_dev, ADRENO_QUIRK_CX_GDSC))

		regulator_set_mode(gmu->cx_gdsc, REGULATOR_MODE_IDLE);



	if (!kgsl_regulator_disable_wait(gmu->cx_gdsc, 5000))

	if (!a6xx_cx_regulator_disable_wait(gmu->cx_gdsc, device, 5000))

		dev_err(&gmu->pdev->dev, "GMU CX gdsc off timeout\n");



	if (ADRENO_QUIRK(adreno_dev, ADRENO_QUIRK_CX_GDSC))
@@ -2296,7 +2296,7 @@ static int a6xx_gmu_first_boot(struct adreno_device *adreno_dev) 


gdsc_off:

	/* Pool to make sure that the CX is off */

	if (!kgsl_regulator_disable_wait(gmu->cx_gdsc, 5000))

	if (!a6xx_cx_regulator_disable_wait(gmu->cx_gdsc, device, 5000))

		dev_err(&gmu->pdev->dev, "GMU CX gdsc off timeout\n");



	return ret;
@@ -2373,7 +2373,7 @@ static int a6xx_gmu_boot(struct adreno_device *adreno_dev) 


gdsc_off:

	/* Pool to make sure that the CX is off */

	if (!kgsl_regulator_disable_wait(gmu->cx_gdsc, 5000))

	if (!a6xx_cx_regulator_disable_wait(gmu->cx_gdsc, device, 5000))

		dev_err(&gmu->pdev->dev, "GMU CX gdsc off timeout\n");



	return ret;
@@ -2826,7 +2826,7 @@ static int a6xx_gmu_power_off(struct adreno_device *adreno_dev) 
	clk_bulk_disable_unprepare(gmu->num_clks, gmu->clks);



	/* Pool to make sure that the CX is off */

	if (!kgsl_regulator_disable_wait(gmu->cx_gdsc, 5000))

	if (!a6xx_cx_regulator_disable_wait(gmu->cx_gdsc, device, 5000))

		dev_err(&gmu->pdev->dev, "GMU CX gdsc off timeout\n");



	device->state = KGSL_STATE_NONE;

drivers/gpu/msm/adreno_a6xx_hwsched.c

+3 −3
Original line number Diff line number Diff line
@@ -214,7 +214,7 @@ static int a6xx_hwsched_gmu_first_boot(struct adreno_device *adreno_dev) 


gdsc_off:

	/* Poll to make sure that the CX is off */

	if (!kgsl_regulator_disable_wait(gmu->cx_gdsc, 5000))

	if (!a6xx_cx_regulator_disable_wait(gmu->cx_gdsc, device, 5000))

		dev_err(&gmu->pdev->dev, "GMU CX gdsc off timeout\n");



	return ret;
@@ -272,7 +272,7 @@ static int a6xx_hwsched_gmu_boot(struct adreno_device *adreno_dev) 


gdsc_off:

	/* Poll to make sure that the CX is off */

	if (!kgsl_regulator_disable_wait(gmu->cx_gdsc, 5000))

	if (!a6xx_cx_regulator_disable_wait(gmu->cx_gdsc, device, 5000))

		dev_err(&gmu->pdev->dev, "GMU CX gdsc off timeout\n");



	return ret;
@@ -370,7 +370,7 @@ static int a6xx_hwsched_gmu_power_off(struct adreno_device *adreno_dev) 
	clk_bulk_disable_unprepare(gmu->num_clks, gmu->clks);



	/* Poll to make sure that the CX is off */

	if (!kgsl_regulator_disable_wait(gmu->cx_gdsc, 5000))

	if (!a6xx_cx_regulator_disable_wait(gmu->cx_gdsc, device, 5000))

		dev_err(&gmu->pdev->dev, "GMU CX gdsc off timeout\n");



	return ret;