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Commit a6761c39 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "drivers: pinctrl: Add gpio to mpm mapping for Monaco"

parents a9eb6ca4 598e0e2e

drivers/irqchip/Makefile

+1 −1
Original line number Diff line number Diff line
@@ -99,7 +99,7 @@ obj-$(CONFIG_QCOM_PDC) += qcom-pdc.o 
obj-$(CONFIG_CSKY_MPINTC)		+= irq-csky-mpintc.o

obj-$(CONFIG_CSKY_APB_INTC)		+= irq-csky-apb-intc.o

obj-$(CONFIG_QCOM_MPM)			+= mpm.o

mpm-objs +=       qcom-mpm.o qcom-mpm-holi.o qcom-mpm-sdxnightjar.o

mpm-objs +=       qcom-mpm.o qcom-mpm-holi.o qcom-mpm-sdxnightjar.o qcom-mpm-monaco.o

obj-$(CONFIG_SIFIVE_PLIC)		+= irq-sifive-plic.o

obj-$(CONFIG_IMX_IRQSTEER)		+= irq-imx-irqsteer.o

obj-$(CONFIG_MADERA_IRQ)		+= irq-madera.o

drivers/irqchip/qcom-mpm-monaco.c

0 → 100644
+15 −0
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0-only



/*

 * Copyright (c) 2020, The Linux Foundation. All rights reserved.

 */



#include <soc/qcom/mpm.h>

const struct mpm_pin mpm_monaco_gic_chip_data[] = {

	{5, 296}, /* lpass_irq_out_sdc */

	{8, 260}, /* eud_p0_dpse_int_mx */

	{86, 183}, /* mpm_wake,spmi_m */

	{89, 422}, /* tsens0_tsens_0C_int */

	{91, 260}, /* eud_p0_dmse_int_mx */

	{-1},

};

drivers/irqchip/qcom-mpm.c

+4 −0
Original line number Diff line number Diff line
@@ -564,6 +564,10 @@ static const struct of_device_id mpm_gic_chip_data_table[] = { 
		.compatible = "qcom,mpm-gic-sdxnightjar",

		.data = mpm_sdxnightjar_gic_chip_data,

	},

	{

		.compatible = "qcom,mpm-gic-monaco",

		.data = mpm_monaco_gic_chip_data,

	},

	{}

};

MODULE_DEVICE_TABLE(of, mpm_gic_chip_data_table);

drivers/pinctrl/qcom/pinctrl-monaco.c

+57 −0
Original line number Diff line number Diff line
@@ -1594,6 +1594,61 @@ static struct pinctrl_qup monaco_qup_regs[] = { 
	QUP_I3C(6, QUP_I3C_6_MODE_OFFSET),

};



static const struct msm_gpio_wakeirq_map monaco_mpm_map[] = {

	{0, 84},

	{3, 13},

	{4, 14},

	{6, 16},

	{7, 17},

	{8, 18},

	{9, 19},

	{10, 20},

	{13, 21},

	{14, 23},

	{16, 24},

	{17, 25},

	{18, 26},

	{19, 27},

	{20, 28},

	{23, 29},

	{24, 30},

	{25, 31},

	{26, 32},

	{29, 33},

	{31, 34},

	{33, 37},

	{34, 38},

	{36, 39},

	{39, 40},

	{40, 41},

	{41, 42},

	{42, 43},

	{45, 44},

	{47, 45},

	{48, 46},

	{49, 47},

	{52, 48},

	{55, 49},

	{56, 50},

	{61, 51},

	{62, 52},

	{63, 53},

	{64, 54},

	{66, 55},

	{67, 56},

	{68, 57},

	{72, 58},

	{73, 59},

	{74, 81},

	{76, 82},

	{78, 60},

	{79, 61},

	{80, 62},

	{82, 63},

	{83, 64},

	{84, 65},

};



static const struct msm_pinctrl_soc_data monaco_pinctrl = {

	.pins = monaco_pins,

	.npins = ARRAY_SIZE(monaco_pins),
@@ -1604,6 +1659,8 @@ static const struct msm_pinctrl_soc_data monaco_pinctrl = { 
	.ngpios = 112,

	.qup_regs = monaco_qup_regs,

	.nqup_regs = ARRAY_SIZE(monaco_qup_regs),

	.wakeirq_map = monaco_mpm_map,

	.nwakeirq_map = ARRAY_SIZE(monaco_mpm_map),

};



static int monaco_pinctrl_probe(struct platform_device *pdev)

include/soc/qcom/mpm.h

+1 −0
Original line number Diff line number Diff line
@@ -18,4 +18,5 @@ void msm_mpm_timer_write(uint32_t *expiry); 
void msm_mpm_enter_sleep(struct cpumask *cpumask);

extern const struct mpm_pin mpm_holi_gic_chip_data[];

extern const struct mpm_pin mpm_sdxnightjar_gic_chip_data[];

extern const struct mpm_pin mpm_monaco_gic_chip_data[];

#endif /* __QCOM_MPM_H__ */