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Commit a65c88dd authored by Hidetoshi Seto's avatar Hidetoshi Seto Committed by H. Peter Anvin
Browse files

x86, mce: unify smp_thermal_interrupt 



Put common functions into therm_throt.c, modify Makefile.

	unexpected_thermal_interrupt
	intel_thermal_interrupt
	smp_thermal_interrupt
	intel_set_thermal_handler

Signed-off-by: default avatarHidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Signed-off-by: default avatarH. Peter Anvin <hpa@zytor.com>
parent e8ce2c5e

arch/x86/kernel/cpu/mcheck/Makefile

+4 −3
Original line number Diff line number Diff line 
obj-y				=  mce.o therm_throt.o

obj-y				=  mce.o



obj-$(CONFIG_X86_NEW_MCE)	+= mce-severity.o

obj-$(CONFIG_X86_OLD_MCE)	+= k7.o p4.o p6.o

obj-$(CONFIG_X86_ANCIENT_MCE)	+= winchip.o p5.o

obj-$(CONFIG_X86_MCE_P4THERMAL)	+= mce_intel.o

obj-$(CONFIG_X86_MCE_INTEL)	+= mce_intel_64.o mce_intel.o

obj-$(CONFIG_X86_MCE_INTEL)	+= mce_intel_64.o

obj-$(CONFIG_X86_MCE_AMD)	+= mce_amd_64.o

obj-$(CONFIG_X86_MCE_NONFATAL)	+= non-fatal.o

obj-$(CONFIG_X86_MCE_THRESHOLD) += threshold.o

obj-$(CONFIG_X86_MCE_INJECT)	+= mce-inject.o



obj-$(CONFIG_X86_THERMAL_VECTOR) += therm_throt.o mce_intel.o

arch/x86/kernel/cpu/mcheck/mce_intel_64.c

+0 −38
Original line number Diff line number Diff line
@@ -9,48 +9,10 @@ 
#include <linux/interrupt.h>

#include <linux/percpu.h>

#include <asm/processor.h>

#include <asm/apic.h>

#include <asm/msr.h>

#include <asm/mce.h>

#include <asm/hw_irq.h>

#include <asm/idle.h>

#include <asm/therm_throt.h>



static void unexpected_thermal_interrupt(void)

{

	printk(KERN_ERR "CPU%d: Unexpected LVT TMR interrupt!\n",

			smp_processor_id());

	add_taint(TAINT_MACHINE_CHECK);

}



/* P4/Xeon Thermal transition interrupt handler: */

static void intel_thermal_interrupt(void)

{

	__u64 msr_val;



	rdmsrl(MSR_IA32_THERM_STATUS, msr_val);

	if (therm_throt_process(msr_val & THERM_STATUS_PROCHOT))

		mce_log_therm_throt_event(msr_val);

}



/* Thermal interrupt handler for this CPU setup: */

static void (*vendor_thermal_interrupt)(void) = unexpected_thermal_interrupt;



asmlinkage void smp_thermal_interrupt(void)

{

	exit_idle();

	irq_enter();

	inc_irq_stat(irq_thermal_count);

	intel_thermal_interrupt();

	irq_exit();

	ack_APIC_irq();

}



void intel_set_thermal_handler(void)

{

	vendor_thermal_interrupt = intel_thermal_interrupt;

}



/*

 * Support for Intel Correct Machine Check Interrupts. This allows

 * the CPU to raise an interrupt when a corrected machine check happened.

arch/x86/kernel/cpu/mcheck/p4.c

+0 −45
Original line number Diff line number Diff line 
/*

 * P4 specific Machine Check Exception Reporting

 */



#include <linux/interrupt.h>

#include <linux/kernel.h>

#include <linux/types.h>

#include <linux/init.h>
@@ -10,9 +8,6 @@ 


#include <asm/therm_throt.h>

#include <asm/processor.h>

#include <asm/system.h>

#include <asm/apic.h>

#include <asm/idle.h>

#include <asm/mce.h>

#include <asm/msr.h>
@@ -33,46 +28,6 @@ struct intel_mce_extended_msrs { 


static int mce_num_extended_msrs;





#ifdef CONFIG_X86_MCE_P4THERMAL



static void unexpected_thermal_interrupt(void)

{

	printk(KERN_ERR "CPU%d: Unexpected LVT TMR interrupt!\n",

			smp_processor_id());

	add_taint(TAINT_MACHINE_CHECK);

}



/* P4/Xeon Thermal transition interrupt handler: */

static void intel_thermal_interrupt(void)

{

	__u64 msr_val;



	rdmsrl(MSR_IA32_THERM_STATUS, msr_val);

	if (therm_throt_process(msr_val & THERM_STATUS_PROCHOT))

		mce_log_therm_throt_event(msr_val);

}



/* Thermal interrupt handler for this CPU setup: */

static void (*vendor_thermal_interrupt)(void) = unexpected_thermal_interrupt;



void smp_thermal_interrupt(struct pt_regs *regs)

{

	exit_idle();

	irq_enter();

	inc_irq_stat(irq_thermal_count);

	vendor_thermal_interrupt();

	irq_exit();

	ack_APIC_irq();

}



void intel_set_thermal_handler(void)

{

	vendor_thermal_interrupt = intel_thermal_interrupt;

}



#endif /* CONFIG_X86_MCE_P4THERMAL */



/* P4/Xeon Extended MCE MSR retrieval, return 0 if unsupported */

static void intel_get_extended_msrs(struct intel_mce_extended_msrs *r)

{

arch/x86/kernel/cpu/mcheck/therm_throt.c

+39 −1
Original line number Diff line number Diff line
@@ -13,6 +13,7 @@ 
 * Credits: Adapted from Zwane Mwaikambo's original code in mce_intel.c.

 *          Inspired by Ross Biro's and Al Borchers' counter code.

 */

#include <linux/interrupt.h>

#include <linux/notifier.h>

#include <linux/jiffies.h>

#include <linux/percpu.h>
@@ -20,6 +21,8 @@ 
#include <linux/cpu.h>



#include <asm/therm_throt.h>

#include <asm/idle.h>

#include <asm/mce.h>



/* How long to wait between reporting thermal events */

#define CHECK_INTERVAL		(300 * HZ)
@@ -186,6 +189,41 @@ static __init int thermal_throttle_init_device(void) 


	return 0;

}



device_initcall(thermal_throttle_init_device);



#endif /* CONFIG_SYSFS */



/* Thermal transition interrupt handler */

void intel_thermal_interrupt(void)

{

	__u64 msr_val;



	rdmsrl(MSR_IA32_THERM_STATUS, msr_val);

	if (therm_throt_process(msr_val & THERM_STATUS_PROCHOT))

		mce_log_therm_throt_event(msr_val);

}



static void unexpected_thermal_interrupt(void)

{

	printk(KERN_ERR "CPU%d: Unexpected LVT TMR interrupt!\n",

			smp_processor_id());

	add_taint(TAINT_MACHINE_CHECK);

}



static void (*smp_thermal_vector)(void) = unexpected_thermal_interrupt;



asmlinkage void smp_thermal_interrupt(struct pt_regs *regs)

{

	exit_idle();

	irq_enter();

	inc_irq_stat(irq_thermal_count);

	smp_thermal_vector();

	irq_exit();

	/* Ack only at the end to avoid potential reentry */

	ack_APIC_irq();

}



void intel_set_thermal_handler(void)

{

	smp_thermal_vector = intel_thermal_interrupt;

}