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Unverified Commit a60925a1 authored by Michael Bestas's avatar Michael Bestas
Browse files

Merge tag 'LA.UM.9.14.r1-19500-LAHAINA.QSSI12.0' of...

Merge tag 'LA.UM.9.14.r1-19500-LAHAINA.QSSI12.0' of https://git.codelinaro.org/clo/la/platform/vendor/opensource/video-driver into android12-5.4-lahaina

"LA.UM.9.14.r1-19500-LAHAINA.QSSI12.0"

* tag 'LA.UM.9.14.r1-19500-LAHAINA.QSSI12.0' of https://git.codelinaro.org/clo/la/platform/vendor/opensource/video-driver:
  msm: vidc: Fix coverity static code analysis violations
  msm: vidc: update VP9 level ranges
  msm: vidc: Cancel batch work in case of pm_suspend
  msm: vidc: Add max supported instances for scuba target
  msm: vidc: Enable v4l2 for bengal

Change-Id: Iaec5df7d1bbcc2d9b0cf9e736b0507c8210452cd
parents e4409f82 165735cc
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+21 −1
Original line number Diff line number Diff line
@@ -677,6 +677,7 @@ static int msm_vidc_pm_suspend(struct device *dev)
	int rc = 0;
	struct msm_vidc_core *core;

	d_vpr_h("%s\n", __func__);
	/*
	 * Bail out if
	 * - driver possibly not probed yet
@@ -698,14 +699,33 @@ static int msm_vidc_pm_suspend(struct device *dev)
		rc = 0;
	else if (rc)
		d_vpr_e("Failed to suspend: %d\n", rc);

	else
		core->pm_suspended  = true;

	return rc;
}

static int msm_vidc_pm_resume(struct device *dev)
{
	struct msm_vidc_core *core;

	d_vpr_h("%s\n", __func__);
	/*
	 * Bail out if
	 * - driver possibly not probed yet
	 * - not the main device. We don't support power management on
	 *   subdevices (e.g. context banks)
	 */
	if (!dev || !dev->driver ||
		!of_device_is_compatible(dev->of_node, "qcom,msm-vidc"))
		return 0;

	core = dev_get_drvdata(dev);
	if (!core) {
		d_vpr_e("%s: invalid core\n", __func__);
		return -EINVAL;
	}
	core->pm_suspended  = false;
	return 0;
}

+14 −4
Original line number Diff line number Diff line
@@ -1407,6 +1407,9 @@ static void msm_vidc_comm_update_ctrl_limits(struct msm_vidc_inst *inst)
	msm_vidc_comm_update_ctrl(inst,
			V4L2_CID_MPEG_VIDEO_HEVC_LEVEL,
			&inst->capability.cap[CAP_HEVC_LEVEL]);
	msm_vidc_comm_update_ctrl(inst,
			V4L2_CID_MPEG_VIDC_VIDEO_VP9_LEVEL,
			&inst->capability.cap[CAP_VP9_LEVEL]);
	/*
	 * Default value of level is unknown, but since we are not
	 * using unknown value while updating level controls, we need
@@ -3051,6 +3054,7 @@ static int msm_comm_init_core(struct msm_vidc_inst *inst)
	core->state = VIDC_CORE_INIT;
	core->smmu_fault_handled = false;
	core->trigger_ssr = false;
	core->pm_suspended = false;
	core->resources.max_secure_inst_count =
		core->resources.max_secure_inst_count ?
		core->resources.max_secure_inst_count :
@@ -4537,10 +4541,11 @@ void msm_vidc_batch_handler(struct work_struct *work)
{
	int rc = 0;
	struct msm_vidc_inst *inst;
	struct msm_vidc_core *core;

	inst = container_of(work, struct msm_vidc_inst, batch_work.work);
	inst = get_inst(get_vidc_core(MSM_VIDC_CORE_VENUS), inst);
	if (!inst) {
	if (!inst || !inst->core) {
		d_vpr_e("%s: invalid params\n", __func__);
		return;
	}
@@ -4550,9 +4555,14 @@ void msm_vidc_batch_handler(struct work_struct *work)
		goto exit;
	}

	core = inst->core;
	if (core->pm_suspended) {
		s_vpr_h(inst->sid, "%s: device in pm suspend state\n", __func__);
		goto exit;
	}

	s_vpr_h(inst->sid, "%s: queue pending batch buffers\n",
		__func__);

	rc = msm_comm_qbufs_batch(inst, NULL);
	if (rc) {
		s_vpr_e(inst->sid, "%s: batch qbufs failed\n", __func__);
@@ -7812,7 +7822,7 @@ u32 msm_comm_calc_framerate(struct msm_vidc_inst *inst,
	capability = &inst->capability;

	if (timestamp_us <= prev_ts) {
		s_vpr_e(inst->sid, "%s: invalid ts %lld, prev ts %lld\n",
		s_vpr_e(inst->sid, "%s: invalid ts %llu, prev ts %llu\n",
			__func__, timestamp_us, prev_ts);
		return framerate;
	}
@@ -7843,7 +7853,7 @@ u32 msm_comm_get_max_framerate(struct msm_vidc_inst *inst)
	}
	avg_framerate = count ? (div_u64(avg_framerate, count)) : (1 << 16);

	s_vpr_l(inst->sid, "%s: fps %u, list size %d\n", __func__, avg_framerate, count);
	s_vpr_l(inst->sid, "%s: fps %u, list size %u\n", __func__, avg_framerate, count);
	mutex_unlock(&inst->timestamps.lock);
	return (u32)avg_framerate;
}
+1 −0
Original line number Diff line number Diff line
@@ -508,6 +508,7 @@ struct msm_vidc_core {
	unsigned long min_freq;
	unsigned long curr_freq;
	struct msm_vidc_core_ops *core_ops;
	bool pm_suspended;
};

struct msm_vidc_inst;
+63 −10
Original line number Diff line number Diff line
@@ -181,6 +181,9 @@ static struct msm_vidc_codec_capability bengal_capabilities_v0[] = {
	{CAP_SECURE_MBS_PER_FRAME, DOMAINS_ALL, CODECS_ALL, 64, 8160, 1, 8160},
	{CAP_SECURE_BITRATE, DOMAINS_ALL, CODECS_ALL, 1, 35000000, 1, 20000000},

	/* All intra encoding usecase specific */
	{CAP_ALLINTRA_MAX_FPS, ENC, H264|HEVC, 1, 60, 1, 30},

	/* Image specific */
	{CAP_HEVC_IMAGE_FRAME_WIDTH, ENC, HEVC, 128, 512, 2, 512},
	{CAP_HEVC_IMAGE_FRAME_HEIGHT, ENC, HEVC, 128, 512, 2, 512},
@@ -200,13 +203,16 @@ static struct msm_vidc_codec_capability bengal_capabilities_v0[] = {
				V4L2_MPEG_VIDEO_HEVC_LEVEL_5, 1,
				V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1},

	/* Level for AVC and HEVC decoder specific */
	/* Level for AVC, HEVC and VP9 decoder specific */
	{CAP_H264_LEVEL, DEC, H264, V4L2_MPEG_VIDEO_H264_LEVEL_1_0,
				V4L2_MPEG_VIDEO_H264_LEVEL_5_0, 1,
				V4L2_MPEG_VIDEO_H264_LEVEL_4_1},
	{CAP_HEVC_LEVEL, DEC, HEVC, V4L2_MPEG_VIDEO_HEVC_LEVEL_1,
				V4L2_MPEG_VIDEO_HEVC_LEVEL_5, 1,
				V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1},
	{CAP_VP9_LEVEL, DEC, VP9, V4L2_MPEG_VIDC_VIDEO_VP9_LEVEL_UNUSED,
				V4L2_MPEG_VIDC_VIDEO_VP9_LEVEL_5, 1,
				V4L2_MPEG_VIDC_VIDEO_VP9_LEVEL_5},
};

static struct msm_vidc_codec_capability bengal_capabilities_v1[] = {
@@ -245,6 +251,9 @@ static struct msm_vidc_codec_capability bengal_capabilities_v1[] = {
	{CAP_SECURE_MBS_PER_FRAME, DOMAINS_ALL, CODECS_ALL, 64, 8160, 1, 8160},
	{CAP_SECURE_BITRATE, DOMAINS_ALL, CODECS_ALL, 1, 35000000, 1, 20000000},

	/* All intra encoding usecase specific */
	{CAP_ALLINTRA_MAX_FPS, ENC, H264|HEVC, 1, 60, 1, 30},

	/* Image specific */
	{CAP_HEVC_IMAGE_FRAME_WIDTH, ENC, HEVC, 128, 512, 2, 512},
	{CAP_HEVC_IMAGE_FRAME_HEIGHT, ENC, HEVC, 128, 512, 2, 512},
@@ -264,13 +273,16 @@ static struct msm_vidc_codec_capability bengal_capabilities_v1[] = {
				V4L2_MPEG_VIDEO_HEVC_LEVEL_5, 1,
				V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1},

	/* Level for AVC and HEVC decoder specific */
	/* Level for AVC, HEVC and VP9 decoder specific */
	{CAP_H264_LEVEL, DEC, H264, V4L2_MPEG_VIDEO_H264_LEVEL_1_0,
				V4L2_MPEG_VIDEO_H264_LEVEL_5_0, 1,
				V4L2_MPEG_VIDEO_H264_LEVEL_4_1},
	{CAP_HEVC_LEVEL, DEC, HEVC, V4L2_MPEG_VIDEO_HEVC_LEVEL_1,
				V4L2_MPEG_VIDEO_HEVC_LEVEL_5, 1,
				V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1},
	{CAP_VP9_LEVEL, DEC, VP9, V4L2_MPEG_VIDC_VIDEO_VP9_LEVEL_UNUSED,
				V4L2_MPEG_VIDC_VIDEO_VP9_LEVEL_5, 1,
				V4L2_MPEG_VIDC_VIDEO_VP9_LEVEL_5},
};

static struct msm_vidc_codec_capability holi_capabilities[] = {
@@ -333,13 +345,16 @@ static struct msm_vidc_codec_capability holi_capabilities[] = {
				V4L2_MPEG_VIDEO_HEVC_LEVEL_5, 1,
				V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1},

	/* Level for AVC and HEVC decoder specific */
	/* Level for AVC, HEVC and VP9 decoder specific */
	{CAP_H264_LEVEL, DEC, H264, V4L2_MPEG_VIDEO_H264_LEVEL_1_0,
				V4L2_MPEG_VIDEO_H264_LEVEL_5_0, 1,
				V4L2_MPEG_VIDEO_H264_LEVEL_4_1},
	{CAP_HEVC_LEVEL, DEC, HEVC, V4L2_MPEG_VIDEO_HEVC_LEVEL_1,
				V4L2_MPEG_VIDEO_HEVC_LEVEL_5, 1,
				V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1},
	{CAP_VP9_LEVEL, DEC, VP9, V4L2_MPEG_VIDC_VIDEO_VP9_LEVEL_UNUSED,
				V4L2_MPEG_VIDC_VIDEO_VP9_LEVEL_5, 1,
				V4L2_MPEG_VIDC_VIDEO_VP9_LEVEL_5},
};

static struct msm_vidc_codec_capability scuba_capabilities[] = {
@@ -402,13 +417,16 @@ static struct msm_vidc_codec_capability scuba_capabilities[] = {
				V4L2_MPEG_VIDEO_HEVC_LEVEL_5, 1,
				V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1},

	/* Level for AVC and HEVC decoder specific */
	/* Level for AVC, HEVC and VP9 decoder specific */
	{CAP_H264_LEVEL, DEC, H264, V4L2_MPEG_VIDEO_H264_LEVEL_1_0,
				V4L2_MPEG_VIDEO_H264_LEVEL_5_0, 1,
				V4L2_MPEG_VIDEO_H264_LEVEL_4_1},
	{CAP_HEVC_LEVEL, DEC, HEVC, V4L2_MPEG_VIDEO_HEVC_LEVEL_1,
				V4L2_MPEG_VIDEO_HEVC_LEVEL_5, 1,
				V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1},
	{CAP_VP9_LEVEL, DEC, VP9, V4L2_MPEG_VIDC_VIDEO_VP9_LEVEL_UNUSED,
				V4L2_MPEG_VIDC_VIDEO_VP9_LEVEL_5, 1,
				V4L2_MPEG_VIDC_VIDEO_VP9_LEVEL_5},
};

static struct msm_vidc_codec_capability lahaina_capabilities[] = {
@@ -512,13 +530,16 @@ static struct msm_vidc_codec_capability lahaina_capabilities[] = {
	                            V4L2_MPEG_VIDEO_HEVC_LEVEL_6, 1,
	                            V4L2_MPEG_VIDEO_HEVC_LEVEL_6},

	/* Level for AVC and HEVC decoder specific */
	/* Level for AVC, HEVC and VP9 decoder specific */
	{CAP_H264_LEVEL, DEC, H264, V4L2_MPEG_VIDEO_H264_LEVEL_1_0,
	                            V4L2_MPEG_VIDEO_H264_LEVEL_6_1, 1,
	                            V4L2_MPEG_VIDEO_H264_LEVEL_5_0},
	{CAP_HEVC_LEVEL, DEC, HEVC, V4L2_MPEG_VIDEO_HEVC_LEVEL_1,
	                            V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1, 1,
	                            V4L2_MPEG_VIDEO_HEVC_LEVEL_5},
	{CAP_VP9_LEVEL, DEC, VP9, V4L2_MPEG_VIDC_VIDEO_VP9_LEVEL_UNUSED,
                                V4L2_MPEG_VIDC_VIDEO_VP9_LEVEL_51, 1,
                                V4L2_MPEG_VIDC_VIDEO_VP9_LEVEL_51},
};

static struct msm_vidc_codec_capability yupik_capabilities_v0[] = {
@@ -627,13 +648,16 @@ static struct msm_vidc_codec_capability yupik_capabilities_v0[] = {
				V4L2_MPEG_VIDEO_HEVC_LEVEL_5, 1,
				V4L2_MPEG_VIDEO_HEVC_LEVEL_4},

	/* Level for AVC and HEVC decoder specific */
	/* Level for AVC, HEVC and VP9 decoder specific */
	{CAP_H264_LEVEL, DEC, H264, V4L2_MPEG_VIDEO_H264_LEVEL_1_0,
				V4L2_MPEG_VIDEO_H264_LEVEL_5_2, 1,
				V4L2_MPEG_VIDEO_H264_LEVEL_4_0},
	{CAP_HEVC_LEVEL, DEC, HEVC, V4L2_MPEG_VIDEO_HEVC_LEVEL_1,
				V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1, 1,
				V4L2_MPEG_VIDEO_HEVC_LEVEL_4},
	{CAP_VP9_LEVEL, DEC, VP9, V4L2_MPEG_VIDC_VIDEO_VP9_LEVEL_UNUSED,
				V4L2_MPEG_VIDC_VIDEO_VP9_LEVEL_51, 1,
				V4L2_MPEG_VIDC_VIDEO_VP9_LEVEL_51},
};

static struct msm_vidc_codec_capability yupik_capabilities_v1[] = {
@@ -735,13 +759,16 @@ static struct msm_vidc_codec_capability yupik_capabilities_v1[] = {
				V4L2_MPEG_VIDEO_HEVC_LEVEL_5, 1,
				V4L2_MPEG_VIDEO_HEVC_LEVEL_4},

	/* Level for AVC and HEVC decoder specific */
	/* Level for AVC, HEVC and VP9 decoder specific */
	{CAP_H264_LEVEL, DEC, H264, V4L2_MPEG_VIDEO_H264_LEVEL_1_0,
				V4L2_MPEG_VIDEO_H264_LEVEL_5_2, 1,
				V4L2_MPEG_VIDEO_H264_LEVEL_4_0},
	{CAP_HEVC_LEVEL, DEC, HEVC, V4L2_MPEG_VIDEO_HEVC_LEVEL_1,
				V4L2_MPEG_VIDEO_HEVC_LEVEL_5, 1,
				V4L2_MPEG_VIDEO_HEVC_LEVEL_4},
	{CAP_VP9_LEVEL, DEC, VP9, V4L2_MPEG_VIDC_VIDEO_VP9_LEVEL_UNUSED,
				V4L2_MPEG_VIDC_VIDEO_VP9_LEVEL_5, 1,
				V4L2_MPEG_VIDC_VIDEO_VP9_LEVEL_5},
};

static struct msm_vidc_codec_capability shima_capabilities_v0[] = {
@@ -848,13 +875,16 @@ static struct msm_vidc_codec_capability shima_capabilities_v0[] = {
	                            V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1, 1,
	                            V4L2_MPEG_VIDEO_HEVC_LEVEL_4},

	/* Level for AVC and HEVC decoder specific */
	/* Level for AVC, HEVC and VP9 decoder specific */
	{CAP_H264_LEVEL, DEC, H264, V4L2_MPEG_VIDEO_H264_LEVEL_1_0,
	                            V4L2_MPEG_VIDEO_H264_LEVEL_6_0, 1,
	                            V4L2_MPEG_VIDEO_H264_LEVEL_4_0},
	{CAP_HEVC_LEVEL, DEC, HEVC, V4L2_MPEG_VIDEO_HEVC_LEVEL_1,
	                            V4L2_MPEG_VIDEO_HEVC_LEVEL_6, 1,
	                            V4L2_MPEG_VIDEO_HEVC_LEVEL_4},
	{CAP_VP9_LEVEL, DEC, VP9, V4L2_MPEG_VIDC_VIDEO_VP9_LEVEL_UNUSED,
                                V4L2_MPEG_VIDC_VIDEO_VP9_LEVEL_51, 1,
                                V4L2_MPEG_VIDC_VIDEO_VP9_LEVEL_51},
};

static struct msm_vidc_codec_capability shima_capabilities_v1[] = {
@@ -955,13 +985,16 @@ static struct msm_vidc_codec_capability shima_capabilities_v1[] = {
	                            V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1, 1,
	                            V4L2_MPEG_VIDEO_HEVC_LEVEL_4},

	/* Level for AVC and HEVC decoder specific */
	/* Level for AVC, HEVC and VP9 decoder specific */
	{CAP_H264_LEVEL, DEC, H264, V4L2_MPEG_VIDEO_H264_LEVEL_1_0,
	                            V4L2_MPEG_VIDEO_H264_LEVEL_5_2, 1,
	                            V4L2_MPEG_VIDEO_H264_LEVEL_4_0},
	{CAP_HEVC_LEVEL, DEC, HEVC, V4L2_MPEG_VIDEO_HEVC_LEVEL_1,
	                            V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1, 1,
	                            V4L2_MPEG_VIDEO_HEVC_LEVEL_4},
	{CAP_VP9_LEVEL, DEC, VP9, V4L2_MPEG_VIDC_VIDEO_VP9_LEVEL_UNUSED,
                                V4L2_MPEG_VIDC_VIDEO_VP9_LEVEL_51, 1,
                                V4L2_MPEG_VIDC_VIDEO_VP9_LEVEL_51},
};

static struct msm_vidc_codec_capability shima_capabilities_v2[] = {
@@ -1061,13 +1094,16 @@ static struct msm_vidc_codec_capability shima_capabilities_v2[] = {
	                            V4L2_MPEG_VIDEO_HEVC_LEVEL_5, 1,
	                            V4L2_MPEG_VIDEO_HEVC_LEVEL_4},

	/* Level for AVC and HEVC decoder specific */
	/* Level for AVC, HEVC and VP9 decoder specific */
	{CAP_H264_LEVEL, DEC, H264, V4L2_MPEG_VIDEO_H264_LEVEL_1_0,
	                            V4L2_MPEG_VIDEO_H264_LEVEL_5_1, 1,
	                            V4L2_MPEG_VIDEO_H264_LEVEL_4_0},
	{CAP_HEVC_LEVEL, DEC, HEVC, V4L2_MPEG_VIDEO_HEVC_LEVEL_1,
	                            V4L2_MPEG_VIDEO_HEVC_LEVEL_5, 1,
	                            V4L2_MPEG_VIDEO_HEVC_LEVEL_4},
	{CAP_VP9_LEVEL, DEC, VP9, V4L2_MPEG_VIDC_VIDEO_VP9_LEVEL_UNUSED,
                                V4L2_MPEG_VIDC_VIDEO_VP9_LEVEL_51, 1,
                                V4L2_MPEG_VIDC_VIDEO_VP9_LEVEL_51},
};

/* Generally Iris2 VPSS only support 8 multiple encoding if
@@ -1538,6 +1574,10 @@ static struct msm_vidc_common_data bengal_common_data_v0[] = {
		.key = "qcom,max-image-load",
		.value = 262144, /* ((8192x8192)/256)@1fps */
	},
	{
		.key = "qcom,max-mbpf",
		.value = 65280,/* ((3840x2176)/256) x 2 */
	},
	{
		.key = "qcom,max-hq-mbs-per-frame",
		.value = 8160,
@@ -1574,6 +1614,10 @@ static struct msm_vidc_common_data bengal_common_data_v0[] = {
		.key = "qcom,vpp_delay_supported",
		.value = 0,
	},
	{
		.key = "qcom,no-cvp",
		.value = 1,
	},
};

static struct msm_vidc_common_data bengal_common_data_v1[] = {
@@ -1605,6 +1649,10 @@ static struct msm_vidc_common_data bengal_common_data_v1[] = {
		.key = "qcom,max-image-load",
		.value = 262144, /* ((8192x8192)/256)@1fps */
	},
	{
		.key = "qcom,max-mbpf",
		.value = 65280,/* ((3840x2176)/256) x 2 */
	},
	{
		.key = "qcom,max-hq-mbs-per-frame",
		.value = 8160,
@@ -1641,6 +1689,10 @@ static struct msm_vidc_common_data bengal_common_data_v1[] = {
		.key = "qcom,vpp_delay_supported",
		.value = 0,
	},
	{
		.key = "qcom,no-cvp",
		.value = 1,
	},
};

static struct msm_vidc_common_data shima_common_data_v0[] = {
@@ -2304,6 +2356,7 @@ static struct msm_vidc_platform_data scuba_data = {
	.codec_caps_count = ARRAY_SIZE(scuba_capabilities),
	.vpss_caps = NULL,
	.vpss_caps_count = 0,
	.max_inst_count = MAX_SUPPORTED_INSTANCES,
};

static const struct of_device_id msm_vidc_dt_device[] = {
+1 −0
Original line number Diff line number Diff line
@@ -257,6 +257,7 @@ enum hal_capability {
	CAP_HEIC_IMAGE_FRAME_HEIGHT,
	CAP_H264_LEVEL,
	CAP_HEVC_LEVEL,
	CAP_VP9_LEVEL,
	CAP_MAX,
};