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Commit a5719a40 authored by Stuart Menefy's avatar Stuart Menefy Committed by Daniel Lezcano
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clocksource/drivers/exynos_mct: Move one-shot check from tick clear to ISR



When a timer tick occurs and the clock is in one-shot mode, the timer
needs to be stopped to prevent it triggering subsequent interrupts.
Currently this code is in exynos4_mct_tick_clear(), but as it is
only needed when an ISR occurs move it into exynos4_mct_tick_isr(),
leaving exynos4_mct_tick_clear() just doing what its name suggests it
should.

Signed-off-by: default avatarStuart Menefy <stuart.menefy@mathembedded.com>
Reviewed-by: default avatarKrzysztof Kozlowski <krzk@kernel.org>
Tested-by: default avatarMarek Szyprowski <m.szyprowski@samsung.com>
Cc: stable@vger.kernel.org # v4.3+
Signed-off-by: default avatarDaniel Lezcano <daniel.lezcano@linaro.org>
parent c950ca8c
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+11 −11
Original line number Original line Diff line number Diff line
@@ -388,6 +388,13 @@ static void exynos4_mct_tick_start(unsigned long cycles,
	exynos4_mct_write(tmp, mevt->base + MCT_L_TCON_OFFSET);
	exynos4_mct_write(tmp, mevt->base + MCT_L_TCON_OFFSET);
}
}


static void exynos4_mct_tick_clear(struct mct_clock_event_device *mevt)
{
	/* Clear the MCT tick interrupt */
	if (readl_relaxed(reg_base + mevt->base + MCT_L_INT_CSTAT_OFFSET) & 1)
		exynos4_mct_write(0x1, mevt->base + MCT_L_INT_CSTAT_OFFSET);
}

static int exynos4_tick_set_next_event(unsigned long cycles,
static int exynos4_tick_set_next_event(unsigned long cycles,
				       struct clock_event_device *evt)
				       struct clock_event_device *evt)
{
{
@@ -420,8 +427,11 @@ static int set_state_periodic(struct clock_event_device *evt)
	return 0;
	return 0;
}
}


static void exynos4_mct_tick_clear(struct mct_clock_event_device *mevt)
static irqreturn_t exynos4_mct_tick_isr(int irq, void *dev_id)
{
{
	struct mct_clock_event_device *mevt = dev_id;
	struct clock_event_device *evt = &mevt->evt;

	/*
	/*
	 * This is for supporting oneshot mode.
	 * This is for supporting oneshot mode.
	 * Mct would generate interrupt periodically
	 * Mct would generate interrupt periodically
@@ -430,16 +440,6 @@ static void exynos4_mct_tick_clear(struct mct_clock_event_device *mevt)
	if (!clockevent_state_periodic(&mevt->evt))
	if (!clockevent_state_periodic(&mevt->evt))
		exynos4_mct_tick_stop(mevt);
		exynos4_mct_tick_stop(mevt);


	/* Clear the MCT tick interrupt */
	if (readl_relaxed(reg_base + mevt->base + MCT_L_INT_CSTAT_OFFSET) & 1)
		exynos4_mct_write(0x1, mevt->base + MCT_L_INT_CSTAT_OFFSET);
}

static irqreturn_t exynos4_mct_tick_isr(int irq, void *dev_id)
{
	struct mct_clock_event_device *mevt = dev_id;
	struct clock_event_device *evt = &mevt->evt;

	exynos4_mct_tick_clear(mevt);
	exynos4_mct_tick_clear(mevt);


	evt->event_handler(evt);
	evt->event_handler(evt);