Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit a42ffe88 authored by Jae Hyun Yoo's avatar Jae Hyun Yoo Committed by Greg Kroah-Hartman
Browse files

ARM: dts: aspeed-g6: fix SPI1/SPI2 quad pin group



[ Upstream commit 890362d41b244536ab63591f813393f5fdf59ed7 ]

Fix incorrect function mappings in pinctrl_qspi1_default and
pinctrl_qspi2_default since their function should be SPI1 and
SPI2 respectively.

Fixes: f510f04c ("ARM: dts: aspeed: Add AST2600 pinmux nodes")
Signed-off-by: default avatarJae Hyun Yoo <quic_jaehyoo@quicinc.com>
Reviewed-by: default avatarAndrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20220329173932.2588289-8-quic_jaehyoo@quicinc.com


Signed-off-by: default avatarJoel Stanley <joel@jms.id.au>
Signed-off-by: default avatarSasha Levin <sashal@kernel.org>
parent 6493ff94
Loading
Loading
Loading
Loading
+2 −2
Original line number Diff line number Diff line
@@ -648,12 +648,12 @@
	};

	pinctrl_qspi1_default: qspi1_default {
		function = "QSPI1";
		function = "SPI1";
		groups = "QSPI1";
	};

	pinctrl_qspi2_default: qspi2_default {
		function = "QSPI2";
		function = "SPI2";
		groups = "QSPI2";
	};