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Commit a42e43c3 authored by Thomas Gleixner's avatar Thomas Gleixner
Browse files

Merge tag 'timers-v5.4' of https://git.linaro.org/people/daniel.lezcano/linux into timers/core 

Pull clocksource/events updates from Daniel Lezcano:

 - Remove dev_err() when used with platform_get_irq (Stephen Boyd)

 - Add DT binding and new compatible for Allwinner sun4i (Maxime Ripard)

 - Register the Atmel tcb clocksource for delays (Alexandre Belloni)

 - Add a clock divider for the Freescale imx platforms and new timer node
   in the DT (Anson Huang)

 - Use DIV_ROUND_CLOSEST macro for the Renesas OSTM (Geert Uytterhoeven)

 - Fix GENMASK and timer operation for the npcm timer (Avi Fishman)

 - Fix timer-of showing an error message when EPROBE_DEFER is
   returned (Jon Hunter)

 - Add new SoC DT binding and match for Renesas timers (Magnus Damm)
parents 3e2d9453 19d60845

Documentation/devicetree/bindings/timer/allwinner,sun4i-a10-timer.yaml

0 → 100644
+102 −0
Original line number Original line Diff line number Diff line 
# SPDX-License-Identifier: GPL-2.0

%YAML 1.2

---

$id: http://devicetree.org/schemas/timer/allwinner,sun4i-a10-timer.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Allwinner A10 Timer Device Tree Bindings



maintainers:

  - Chen-Yu Tsai <wens@csie.org>

  - Maxime Ripard <maxime.ripard@bootlin.com>



properties:

  compatible:

    enum:

      - allwinner,sun4i-a10-timer

      - allwinner,sun8i-a23-timer

      - allwinner,sun8i-v3s-timer

      - allwinner,suniv-f1c100s-timer



  reg:

    maxItems: 1



  interrupts:

    description:

      List of timers interrupts



  clocks:

    maxItems: 1



allOf:

  - if:

      properties:

        compatible:

          items:

            const: allwinner,sun4i-a10-timer



    then:

      properties:

        interrupts:

          minItems: 6

          maxItems: 6



  - if:

      properties:

        compatible:

          items:

            const: allwinner,sun8i-a23-timer



    then:

      properties:

        interrupts:

          minItems: 2

          maxItems: 2



  - if:

      properties:

        compatible:

          items:

            const: allwinner,sun8i-v3s-timer



    then:

      properties:

        interrupts:

          minItems: 3

          maxItems: 3



  - if:

      properties:

        compatible:

          items:

            const: allwinner,suniv-f1c100s-timer



    then:

      properties:

        interrupts:

          minItems: 3

          maxItems: 3



required:

  - compatible

  - reg

  - interrupts

  - clocks



additionalProperties: false



examples:

  - |

    timer {

        compatible = "allwinner,sun4i-a10-timer";

        reg = <0x01c20c00 0x400>;

        interrupts = <22>,

                     <23>,

                     <24>,

                     <25>,

                     <67>,

                     <68>;

        clocks = <&osc>;

    };



...

Documentation/devicetree/bindings/timer/allwinner,sun4i-timer.txt

deleted100644 → 0
+0 −19
Original line number Original line Diff line number Diff line 
Allwinner A1X SoCs Timer Controller



Required properties:



- compatible : should be one of the following:

              "allwinner,sun4i-a10-timer"

              "allwinner,suniv-f1c100s-timer"

- reg : Specifies base physical address and size of the registers.

- interrupts : The interrupt of the first timer

- clocks: phandle to the source clock (usually a 24 MHz fixed clock)



Example:



timer {

	compatible = "allwinner,sun4i-a10-timer";

	reg = <0x01c20c00 0x400>;

	interrupts = <22>;

	clocks = <&osc>;

};

Documentation/devicetree/bindings/timer/allwinner,sun5i-a13-hstimer.txt

deleted100644 → 0
+0 −26
Original line number Original line Diff line number Diff line 
Allwinner SoCs High Speed Timer Controller



Required properties:



- compatible :	should be "allwinner,sun5i-a13-hstimer" or

		"allwinner,sun7i-a20-hstimer"

- reg : Specifies base physical address and size of the registers.

- interrupts :	The interrupts of these timers (2 for the sun5i IP, 4 for the sun7i

		one)

- clocks: phandle to the source clock (usually the AHB clock)



Optional properties:

- resets: phandle to a reset controller asserting the timer



Example:



timer@1c60000 {

	compatible = "allwinner,sun7i-a20-hstimer";

	reg = <0x01c60000 0x1000>;

	interrupts = <0 51 1>,

		     <0 52 1>,

		     <0 53 1>,

		     <0 54 1>;

	clocks = <&ahb1_gates 19>;

	resets = <&ahb1rst 19>;

};

Documentation/devicetree/bindings/timer/allwinner,sun5i-a13-hstimer.yaml

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+79 −0
Original line number Original line Diff line number Diff line 
# SPDX-License-Identifier: GPL-2.0

%YAML 1.2

---

$id: http://devicetree.org/schemas/timer/allwinner,sun5i-a13-hstimer.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Allwinner A13 High-Speed Timer Device Tree Bindings



maintainers:

  - Chen-Yu Tsai <wens@csie.org>

  - Maxime Ripard <maxime.ripard@bootlin.com>



properties:

  compatible:

    oneOf:

      - const: allwinner,sun5i-a13-hstimer

      - const: allwinner,sun7i-a20-hstimer

      - items:

          - const: allwinner,sun6i-a31-hstimer

          - const: allwinner,sun7i-a20-hstimer



  reg:

    maxItems: 1



  interrupts:

    minItems: 2

    maxItems: 4

    items:

      - description: Timer 0 Interrupt

      - description: Timer 1 Interrupt

      - description: Timer 2 Interrupt

      - description: Timer 3 Interrupt



  clocks:

    maxItems: 1



  resets:

    maxItems: 1



required:

  - compatible

  - reg

  - interrupts

  - clocks



if:

  properties:

    compatible:

      items:

        const: allwinner,sun5i-a13-hstimer



then:

  properties:

    interrupts:

      minItems: 2

      maxItems: 2



else:

  properties:

    interrupts:

      minItems: 4

      maxItems: 4



additionalProperties: false



examples:

  - |

    timer@1c60000 {

        compatible = "allwinner,sun7i-a20-hstimer";

        reg = <0x01c60000 0x1000>;

        interrupts = <0 51 1>,

                     <0 52 1>,

                     <0 53 1>,

                     <0 54 1>;

        clocks = <&ahb1_gates 19>;

        resets = <&ahb1rst 19>;

    };



...

Documentation/devicetree/bindings/timer/renesas,cmt.txt

+23 −17
Original line number Original line Diff line number Diff line
@@ -12,16 +12,13 @@ datasheets. 
Required Properties:

Required Properties:





  - compatible: must contain one or more of the following:

  - compatible: must contain one or more of the following:

    - "renesas,cmt-48-sh73a0" for the sh73A0 48-bit CMT

		(CMT1)

    - "renesas,cmt-48-r8a7740" for the r8a7740 48-bit CMT

		(CMT1)

    - "renesas,cmt-48" for all non-second generation 48-bit CMT

		(CMT1 on sh73a0 and r8a7740)

		This is a fallback for the above renesas,cmt-48-* entries.



    - "renesas,r8a73a4-cmt0" for the 32-bit CMT0 device included in r8a73a4.

    - "renesas,r8a73a4-cmt0" for the 32-bit CMT0 device included in r8a73a4.

    - "renesas,r8a73a4-cmt1" for the 48-bit CMT1 device included in r8a73a4.

    - "renesas,r8a73a4-cmt1" for the 48-bit CMT1 device included in r8a73a4.

    - "renesas,r8a7740-cmt0" for the 32-bit CMT0 device included in r8a7740.

    - "renesas,r8a7740-cmt1" for the 48-bit CMT1 device included in r8a7740.

    - "renesas,r8a7740-cmt2" for the 32-bit CMT2 device included in r8a7740.

    - "renesas,r8a7740-cmt3" for the 32-bit CMT3 device included in r8a7740.

    - "renesas,r8a7740-cmt4" for the 32-bit CMT4 device included in r8a7740.

    - "renesas,r8a7743-cmt0" for the 32-bit CMT0 device included in r8a7743.

    - "renesas,r8a7743-cmt0" for the 32-bit CMT0 device included in r8a7743.

    - "renesas,r8a7743-cmt1" for the 48-bit CMT1 device included in r8a7743.

    - "renesas,r8a7743-cmt1" for the 48-bit CMT1 device included in r8a7743.

    - "renesas,r8a7744-cmt0" for the 32-bit CMT0 device included in r8a7744.

    - "renesas,r8a7744-cmt0" for the 32-bit CMT0 device included in r8a7744.
@@ -31,29 +28,38 @@ Required Properties: 
    - "renesas,r8a77470-cmt0" for the 32-bit CMT0 device included in r8a77470.

    - "renesas,r8a77470-cmt0" for the 32-bit CMT0 device included in r8a77470.

    - "renesas,r8a77470-cmt1" for the 48-bit CMT1 device included in r8a77470.

    - "renesas,r8a77470-cmt1" for the 48-bit CMT1 device included in r8a77470.

    - "renesas,r8a774a1-cmt0" for the 32-bit CMT0 device included in r8a774a1.

    - "renesas,r8a774a1-cmt0" for the 32-bit CMT0 device included in r8a774a1.

    - "renesas,r8a774a1-cmt1" for the 48-bit CMT1 device included in r8a774a1.

    - "renesas,r8a774a1-cmt1" for the 48-bit CMT devices included in r8a774a1.

    - "renesas,r8a774c0-cmt0" for the 32-bit CMT0 device included in r8a774c0.

    - "renesas,r8a774c0-cmt0" for the 32-bit CMT0 device included in r8a774c0.

    - "renesas,r8a774c0-cmt1" for the 48-bit CMT1 device included in r8a774c0.

    - "renesas,r8a774c0-cmt1" for the 48-bit CMT devices included in r8a774c0.

    - "renesas,r8a7790-cmt0" for the 32-bit CMT0 device included in r8a7790.

    - "renesas,r8a7790-cmt0" for the 32-bit CMT0 device included in r8a7790.

    - "renesas,r8a7790-cmt1" for the 48-bit CMT1 device included in r8a7790.

    - "renesas,r8a7790-cmt1" for the 48-bit CMT1 device included in r8a7790.

    - "renesas,r8a7791-cmt0" for the 32-bit CMT0 device included in r8a7791.

    - "renesas,r8a7791-cmt0" for the 32-bit CMT0 device included in r8a7791.

    - "renesas,r8a7791-cmt1" for the 48-bit CMT1 device included in r8a7791.

    - "renesas,r8a7791-cmt1" for the 48-bit CMT1 device included in r8a7791.

    - "renesas,r8a7792-cmt0" for the 32-bit CMT0 device included in r8a7792.

    - "renesas,r8a7792-cmt1" for the 48-bit CMT1 device included in r8a7792.

    - "renesas,r8a7793-cmt0" for the 32-bit CMT0 device included in r8a7793.

    - "renesas,r8a7793-cmt0" for the 32-bit CMT0 device included in r8a7793.

    - "renesas,r8a7793-cmt1" for the 48-bit CMT1 device included in r8a7793.

    - "renesas,r8a7793-cmt1" for the 48-bit CMT1 device included in r8a7793.

    - "renesas,r8a7794-cmt0" for the 32-bit CMT0 device included in r8a7794.

    - "renesas,r8a7794-cmt0" for the 32-bit CMT0 device included in r8a7794.

    - "renesas,r8a7794-cmt1" for the 48-bit CMT1 device included in r8a7794.

    - "renesas,r8a7794-cmt1" for the 48-bit CMT1 device included in r8a7794.

    - "renesas,r8a7795-cmt0" for the 32-bit CMT0 device included in r8a7795.

    - "renesas,r8a7795-cmt0" for the 32-bit CMT0 device included in r8a7795.

    - "renesas,r8a7795-cmt1" for the 48-bit CMT1 device included in r8a7795.

    - "renesas,r8a7795-cmt1" for the 48-bit CMT devices included in r8a7795.

    - "renesas,r8a7796-cmt0" for the 32-bit CMT0 device included in r8a7796.

    - "renesas,r8a7796-cmt0" for the 32-bit CMT0 device included in r8a7796.

    - "renesas,r8a7796-cmt1" for the 48-bit CMT1 device included in r8a7796.

    - "renesas,r8a7796-cmt1" for the 48-bit CMT devices included in r8a7796.

    - "renesas,r8a77965-cmt0" for the 32-bit CMT0 device included in r8a77965.

    - "renesas,r8a77965-cmt0" for the 32-bit CMT0 device included in r8a77965.

    - "renesas,r8a77965-cmt1" for the 48-bit CMT1 device included in r8a77965.

    - "renesas,r8a77965-cmt1" for the 48-bit CMT devices included in r8a77965.

    - "renesas,r8a77970-cmt0" for the 32-bit CMT0 device included in r8a77970.

    - "renesas,r8a77970-cmt0" for the 32-bit CMT0 device included in r8a77970.

    - "renesas,r8a77970-cmt1" for the 48-bit CMT1 device included in r8a77970.

    - "renesas,r8a77970-cmt1" for the 48-bit CMT devices included in r8a77970.

    - "renesas,r8a77980-cmt0" for the 32-bit CMT0 device included in r8a77980.

    - "renesas,r8a77980-cmt0" for the 32-bit CMT0 device included in r8a77980.

    - "renesas,r8a77980-cmt1" for the 48-bit CMT1 device included in r8a77980.

    - "renesas,r8a77980-cmt1" for the 48-bit CMT devices included in r8a77980.

    - "renesas,r8a77990-cmt0" for the 32-bit CMT0 device included in r8a77990.

    - "renesas,r8a77990-cmt0" for the 32-bit CMT0 device included in r8a77990.

    - "renesas,r8a77990-cmt1" for the 48-bit CMT1 device included in r8a77990.

    - "renesas,r8a77990-cmt1" for the 48-bit CMT devices included in r8a77990.

    - "renesas,r8a77995-cmt0" for the 32-bit CMT0 device included in r8a77995.

    - "renesas,r8a77995-cmt1" for the 48-bit CMT devices included in r8a77995.

    - "renesas,sh73a0-cmt0" for the 32-bit CMT0 device included in sh73a0.

    - "renesas,sh73a0-cmt1" for the 48-bit CMT1 device included in sh73a0.

    - "renesas,sh73a0-cmt2" for the 32-bit CMT2 device included in sh73a0.

    - "renesas,sh73a0-cmt3" for the 32-bit CMT3 device included in sh73a0.

    - "renesas,sh73a0-cmt4" for the 32-bit CMT4 device included in sh73a0.





    - "renesas,rcar-gen2-cmt0" for 32-bit CMT0 devices included in R-Car Gen2

    - "renesas,rcar-gen2-cmt0" for 32-bit CMT0 devices included in R-Car Gen2

		and RZ/G1.

		and RZ/G1.
@@ -63,7 +69,7 @@ Required Properties: 
		listed above.

		listed above.

    - "renesas,rcar-gen3-cmt0" for 32-bit CMT0 devices included in R-Car Gen3

    - "renesas,rcar-gen3-cmt0" for 32-bit CMT0 devices included in R-Car Gen3

		and RZ/G2.

		and RZ/G2.

    - "renesas,rcar-gen3-cmt1" for 48-bit CMT1 devices included in R-Car Gen3

    - "renesas,rcar-gen3-cmt1" for 48-bit CMT devices included in R-Car Gen3

		and RZ/G2.

		and RZ/G2.

		These are fallbacks for R-Car Gen3 and RZ/G2 entries listed

		These are fallbacks for R-Car Gen3 and RZ/G2 entries listed

		above.

		above.