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Commit a2c49e7b authored by Maxime Ripard's avatar Maxime Ripard Committed by Daniel Lezcano
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clocksource: sun4i: Cleanup parent clock setup 



The current bring-up code for the timer was overly complicated. The only
thing we need is actually which clock we want to use as source and
that's pretty much all. Let's keep it that way.

Signed-off-by: default avatarMaxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: default avatarDaniel Lezcano <daniel.lezcano@linaro.org>
parent c2b852f7

drivers/clocksource/sun4i_timer.c

+5 −10
Original line number Diff line number Diff line
@@ -30,6 +30,9 @@ 
#define TIMER_CTL_REG(val)	(0x10 * val + 0x10)

#define TIMER_CTL_ENABLE		BIT(0)

#define TIMER_CTL_RELOAD		BIT(1)

#define TIMER_CTL_CLK_SRC(val)		(((val) & 0x3) << 2)

#define TIMER_CTL_CLK_SRC_OSC24M		(1)

#define TIMER_CTL_CLK_PRES(val)		(((val) & 0x7) << 4)

#define TIMER_CTL_ONESHOT		BIT(7)

#define TIMER_INTVAL_REG(val)	(0x10 * (val) + 0x14)

#define TIMER_CNTVAL_REG(val)	(0x10 * (val) + 0x18)
@@ -168,16 +171,8 @@ static void __init sun4i_timer_init(struct device_node *node) 


	writel(rate / HZ, timer_base + TIMER_INTVAL_REG(0));



	/* set clock source to HOSC, 16 pre-division */

	val = readl(timer_base + TIMER_CTL_REG(0));

	val &= ~(0x07 << 4);

	val &= ~(0x03 << 2);

	val |= (4 << 4) | (1 << 2);

	writel(val, timer_base + TIMER_CTL_REG(0));



	/* set mode to auto reload */

	val = readl(timer_base + TIMER_CTL_REG(0));

	writel(val | TIMER_CTL_RELOAD, timer_base + TIMER_CTL_REG(0));

	writel(TIMER_CTL_CLK_SRC(TIMER_CTL_CLK_SRC_OSC24M) | TIMER_CTL_RELOAD,

	       timer_base + TIMER_CTL_REG(0));



	ret = setup_irq(irq, &sun4i_timer_irq);

	if (ret)