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Commit a257f188 authored by Usha Ketineni's avatar Usha Ketineni Committed by Jeff Kirsher
Browse files

ice: Limit Max TCs on devices with more than 4 ports 



This patch limits the max TCs set by the driver to the value provided by
the firmware as per the capabilities of the device. Otherwise, hard coding
to 8 TC max would fail the device configurations with more than 4 ports.

Signed-off-by: default avatarUsha Ketineni <usha.k.ketineni@intel.com>
Signed-off-by: default avatarTony Nguyen <anthony.l.nguyen@intel.com>
Tested-by: default avatarAndrew Bowers <andrewx.bowers@intel.com>
Signed-off-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
parent 6a025730

drivers/net/ethernet/intel/ice/ice_adminq_cmd.h

+1 −0
Original line number Original line Diff line number Diff line
@@ -91,6 +91,7 @@ struct ice_aqc_list_caps_elem { 
#define ICE_AQC_CAPS_SRIOV				0x0012

#define ICE_AQC_CAPS_SRIOV				0x0012

#define ICE_AQC_CAPS_VF					0x0013

#define ICE_AQC_CAPS_VF					0x0013

#define ICE_AQC_CAPS_VSI				0x0017

#define ICE_AQC_CAPS_VSI				0x0017

#define ICE_AQC_CAPS_DCB				0x0018

#define ICE_AQC_CAPS_RSS				0x0040

#define ICE_AQC_CAPS_RSS				0x0040

#define ICE_AQC_CAPS_RXQS				0x0041

#define ICE_AQC_CAPS_RXQS				0x0041

#define ICE_AQC_CAPS_TXQS				0x0042

#define ICE_AQC_CAPS_TXQS				0x0042

drivers/net/ethernet/intel/ice/ice_common.c

+12 −0
Original line number Original line Diff line number Diff line
@@ -1594,6 +1594,18 @@ ice_parse_caps(struct ice_hw *hw, void *buf, u32 cap_count, 
					  prefix, func_p->guar_num_vsi);

					  prefix, func_p->guar_num_vsi);

			}

			}

			break;

			break;

		case ICE_AQC_CAPS_DCB:

			caps->dcb = (number == 1);

			caps->active_tc_bitmap = logical_id;

			caps->maxtc = phys_id;

			ice_debug(hw, ICE_DBG_INIT,

				  "%s: DCB = %d\n", prefix, caps->dcb);

			ice_debug(hw, ICE_DBG_INIT,

				  "%s: active TC bitmap = %d\n", prefix,

				  caps->active_tc_bitmap);

			ice_debug(hw, ICE_DBG_INIT,

				  "%s: TC max = %d\n", prefix, caps->maxtc);

			break;

		case ICE_AQC_CAPS_RSS:

		case ICE_AQC_CAPS_RSS:

			caps->rss_table_size = number;

			caps->rss_table_size = number;

			caps->rss_table_entry_width = logical_id;

			caps->rss_table_entry_width = logical_id;

drivers/net/ethernet/intel/ice/ice_dcb_lib.c

+8 −2
Original line number Original line Diff line number Diff line
@@ -413,7 +413,7 @@ static int ice_dcb_sw_dflt_cfg(struct ice_pf *pf, bool locked) 
	memset(&pi->local_dcbx_cfg, 0, sizeof(*dcbcfg));

	memset(&pi->local_dcbx_cfg, 0, sizeof(*dcbcfg));





	dcbcfg->etscfg.willing = 1;

	dcbcfg->etscfg.willing = 1;

	dcbcfg->etscfg.maxtcs = 8;

	dcbcfg->etscfg.maxtcs = hw->func_caps.common_cap.maxtc;

	dcbcfg->etscfg.tcbwtable[0] = 100;

	dcbcfg->etscfg.tcbwtable[0] = 100;

	dcbcfg->etscfg.tsatable[0] = ICE_IEEE_TSA_ETS;

	dcbcfg->etscfg.tsatable[0] = ICE_IEEE_TSA_ETS;
@@ -422,7 +422,7 @@ static int ice_dcb_sw_dflt_cfg(struct ice_pf *pf, bool locked) 
	dcbcfg->etsrec.willing = 0;

	dcbcfg->etsrec.willing = 0;





	dcbcfg->pfc.willing = 1;

	dcbcfg->pfc.willing = 1;

	dcbcfg->pfc.pfccap = IEEE_8021QAZ_MAX_TCS;

	dcbcfg->pfc.pfccap = hw->func_caps.common_cap.maxtc;





	dcbcfg->numapps = 1;

	dcbcfg->numapps = 1;

	dcbcfg->app[0].selector = ICE_APP_SEL_ETHTYPE;

	dcbcfg->app[0].selector = ICE_APP_SEL_ETHTYPE;
@@ -454,6 +454,9 @@ int ice_init_pf_dcb(struct ice_pf *pf, bool locked) 
	err = ice_init_dcb(hw);

	err = ice_init_dcb(hw);

	if (err) {

	if (err) {

		/* FW LLDP is disabled, activate SW DCBX/LLDP mode */

		/* FW LLDP is disabled, activate SW DCBX/LLDP mode */

		dev_info(&pf->pdev->dev,

			 "DCB is enabled in the hardware, max number of TCs supported on this port are %d\n",

			 pf->hw.func_caps.common_cap.maxtc);

		dev_info(&pf->pdev->dev,

		dev_info(&pf->pdev->dev,

			 "FW LLDP is disabled, DCBx/LLDP in SW mode.\n");

			 "FW LLDP is disabled, DCBx/LLDP in SW mode.\n");

		port_info->is_sw_lldp = true;

		port_info->is_sw_lldp = true;
@@ -484,6 +487,9 @@ int ice_init_pf_dcb(struct ice_pf *pf, bool locked) 
	if (err)

	if (err)

		goto dcb_init_err;

		goto dcb_init_err;





	dev_info(&pf->pdev->dev,

		 "DCB is enabled in the hardware, max number of TCs supported on this port are %d\n",

		 pf->hw.func_caps.common_cap.maxtc);

	dev_info(&pf->pdev->dev, "DCBX offload supported\n");

	dev_info(&pf->pdev->dev, "DCBX offload supported\n");

	return err;

	return err;

drivers/net/ethernet/intel/ice/ice_type.h

+3 −0
Original line number Original line Diff line number Diff line
@@ -139,6 +139,9 @@ struct ice_phy_info { 
/* Common HW capabilities for SW use */

/* Common HW capabilities for SW use */

struct ice_hw_common_caps {

struct ice_hw_common_caps {

	u32 valid_functions;

	u32 valid_functions;

	/* DCB capabilities */

	u32 active_tc_bitmap;

	u32 maxtc;





	/* Tx/Rx queues */

	/* Tx/Rx queues */

	u16 num_rxq;		/* Number/Total Rx queues */

	u16 num_rxq;		/* Number/Total Rx queues */