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Commit a1bcd20b authored by Manuel Gomez's avatar Manuel Gomez
Browse files

ARM: dts: msm: WoL IRQ support for AQR and Napa PHYs 

Add interrupt properties to configure the WoL interrupt
lines that are connected to GPIO103 and GPIO81 on SDX65 from
AQR PHY and Napa PHY, respectively.

Change-Id: I8a2ce294b094c10ab93f1b21723549faff8f8c3a
parent 179cd890

qcom/sdxlemur-mtp-cpe.dtsi

+6 −0
Original line number Diff line number Diff line
@@ -146,6 +146,9 @@ 
				qcom,ioss = <&ioss>;

				qcom,ioss_interfaces = <&ioss_qps615_eth0>;



				interrupts-extended = <&tlmm 103 IRQ_TYPE_EDGE_FALLING>;

				interrupt-names = "wol_irq";



				/* ipa shares this group */

				qcom,iommu-group = <&ipa_eth_group1>;
@@ -171,6 +174,9 @@ 
				qcom,ioss = <&ioss>;

				qcom,ioss_interfaces = <&ioss_qps615_eth1>;



				interrupts-extended = <&tlmm 81 IRQ_TYPE_EDGE_FALLING>;

				interrupt-names = "wol_irq";



				/* ipa shares this group */

				qcom,iommu-group = <&ipa_eth_group1>;