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Commit a17bab2d authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'renesas-fixes3-for-v5.0' of... 

Merge tag 'renesas-fixes3-for-v5.0' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into arm/fixes

Third Round of Renesas ARM Based SoC Fixes for v5.0

* Convert to new LVDS DT bindings fixing a regression introduced in v4.17

* tag 'renesas-fixes3-for-v5.0' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas

:
  ARM: dts: r8a7743: Convert to new LVDS DT bindings

Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents a7403eb2 6a6a7976

arch/arm/boot/dts/r8a7743.dtsi

+30 −6
Original line number Diff line number Diff line
@@ -1681,15 +1681,12 @@ 


		du: display@feb00000 {

			compatible = "renesas,du-r8a7743";

			reg = <0 0xfeb00000 0 0x40000>,

			      <0 0xfeb90000 0 0x1c>;

			reg-names = "du", "lvds.0";

			reg = <0 0xfeb00000 0 0x40000>;

			interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 724>,

				 <&cpg CPG_MOD 723>,

				 <&cpg CPG_MOD 726>;

			clock-names = "du.0", "du.1", "lvds.0";

				 <&cpg CPG_MOD 723>;

			clock-names = "du.0", "du.1";

			status = "disabled";



			ports {
@@ -1704,6 +1701,33 @@ 
				port@1 {

					reg = <1>;

					du_out_lvds0: endpoint {

						remote-endpoint = <&lvds0_in>;

					};

				};

			};

		};



		lvds0: lvds@feb90000 {

			compatible = "renesas,r8a7743-lvds";

			reg = <0 0xfeb90000 0 0x1c>;

			clocks = <&cpg CPG_MOD 726>;

			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;

			resets = <&cpg 726>;

			status = "disabled";



			ports {

				#address-cells = <1>;

				#size-cells = <0>;



				port@0 {

					reg = <0>;

					lvds0_in: endpoint {

						remote-endpoint = <&du_out_lvds0>;

					};

				};

				port@1 {

					reg = <1>;

					lvds0_out: endpoint {

					};

				};

			};