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Commit a122b62d authored by Anthony Koo's avatar Anthony Koo Committed by Alex Deucher
Browse files

drm/amd/display: refactor out programming of vupdate interrupt 



[Why]
More clearly isolate the code that is involved in programming of
vupdate interrupt

[How]
Add function for programming of vupdate interrupt.
Call it after timing is programmed.

Signed-off-by: default avatarAnthony Koo <Anthony.Koo@amd.com>
Reviewed-by: default avatarAric Cyr <Aric.Cyr@amd.com>
Acked-by: default avatarBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Acked-by: default avatarTony Cheng <Tony.Cheng@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 68f1a00c

drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

+5 −0
Original line number Diff line number Diff line
@@ -1341,6 +1341,11 @@ static enum dc_status apply_single_controller_ctx_to_hw( 
	/*  */

	dc->hwss.enable_stream_timing(pipe_ctx, context, dc);



	if (pipe_ctx->stream_res.tg->funcs->program_vupdate_interrupt)

		pipe_ctx->stream_res.tg->funcs->program_vupdate_interrupt(

						pipe_ctx->stream_res.tg,

							&stream->timing);



	if (pipe_ctx->stream->signal != SIGNAL_TYPE_VIRTUAL)

		pipe_ctx->stream_res.stream_enc->funcs->dig_connect_to_otg(

			pipe_ctx->stream_res.stream_enc,

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c

+40 −11
Original line number Diff line number Diff line
@@ -186,6 +186,42 @@ void optc1_program_vline_interrupt( 
	}

}



void optc1_program_vupdate_interrupt(

		struct timing_generator *optc,

		const struct dc_crtc_timing *dc_crtc_timing)

{

	struct optc *optc1 = DCN10TG_FROM_TG(optc);

	int32_t vertical_line_start;

	uint32_t asic_blank_end;

	uint32_t vesa_sync_start;

	struct dc_crtc_timing patched_crtc_timing;



	patched_crtc_timing = *dc_crtc_timing;

	optc1_apply_front_porch_workaround(optc, &patched_crtc_timing);



	/* asic_h_blank_end = HsyncWidth + HbackPorch =

	 * vesa. usHorizontalTotal - vesa. usHorizontalSyncStart -

	 * vesa.h_left_border

	 */

	vesa_sync_start = patched_crtc_timing.h_addressable +

			patched_crtc_timing.h_border_right +

			patched_crtc_timing.h_front_porch;



	asic_blank_end = patched_crtc_timing.h_total -

			vesa_sync_start -

			patched_crtc_timing.h_border_left;



	/* Use OTG_VERTICAL_INTERRUPT2 replace VUPDATE interrupt,

	 * program the reg for interrupt postition.

	 */

	vertical_line_start = asic_blank_end - optc->dlg_otg_param.vstartup_start + 1;

	if (vertical_line_start < 0)

		vertical_line_start = 0;



	REG_SET(OTG_VERTICAL_INTERRUPT2_POSITION, 0,

			OTG_VERTICAL_INTERRUPT2_LINE_START, vertical_line_start);

}



/**

 * program_timing_generator   used by mode timing set

 * Program CRTC Timing Registers - OTG_H_*, OTG_V_*, Pixel repetition.
@@ -288,22 +324,14 @@ void optc1_program_timing( 
			patched_crtc_timing.v_addressable +

			patched_crtc_timing.v_border_bottom);



	REG_UPDATE_2(OTG_V_BLANK_START_END,

			OTG_V_BLANK_START, asic_blank_start,

			OTG_V_BLANK_END, asic_blank_end);



	/* Use OTG_VERTICAL_INTERRUPT2 replace VUPDATE interrupt,

	 * program the reg for interrupt postition.

	 */

	vertical_line_start = asic_blank_end - optc->dlg_otg_param.vstartup_start + 1;

	v_fp2 = 0;

	if (vertical_line_start < 0)

		v_fp2 = -vertical_line_start;

	if (vertical_line_start < 0)

		vertical_line_start = 0;



	REG_SET(OTG_VERTICAL_INTERRUPT2_POSITION, 0,

			OTG_VERTICAL_INTERRUPT2_LINE_START, vertical_line_start);

	REG_UPDATE_2(OTG_V_BLANK_START_END,

			OTG_V_BLANK_START, asic_blank_start,

			OTG_V_BLANK_END, asic_blank_end);



	/* v_sync polarity */

	v_sync_polarity = patched_crtc_timing.flags.VSYNC_POSITIVE_POLARITY ?
@@ -1453,6 +1481,7 @@ static const struct timing_generator_funcs dcn10_tg_funcs = { 
		.validate_timing = optc1_validate_timing,

		.program_timing = optc1_program_timing,

		.program_vline_interrupt = optc1_program_vline_interrupt,

		.program_vupdate_interrupt = optc1_program_vupdate_interrupt,

		.program_global_sync = optc1_program_global_sync,

		.enable_crtc = optc1_enable_crtc,

		.disable_crtc = optc1_disable_crtc,

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

+3 −0
Original line number Diff line number Diff line
@@ -154,6 +154,9 @@ struct timing_generator_funcs { 
			const struct dc_crtc_timing *dc_crtc_timing,

			enum vline_select vline,

			const union vline_config *vline_config);



	void (*program_vupdate_interrupt)(struct timing_generator *optc,

			const struct dc_crtc_timing *dc_crtc_timing);

	bool (*enable_crtc)(struct timing_generator *tg);

	bool (*disable_crtc)(struct timing_generator *tg);

	bool (*is_counter_moving)(struct timing_generator *tg);