x86/fpu/xstate: Define and use 'fpu_user_xstate_size' (a1141e0b) · Commits · e / devices / android_kernel_fairphone_FP5

arch/x86/include/asm/fpu/xstate.h

+0 −1

Original line number	Diff line number	Diff line
		@@ -39,7 +39,6 @@
		#define REX_PREFIX
		#endif

		extern unsigned int xstate_size;
		extern u64 xfeatures_mask;
		extern u64 xstate_fx_sw_bytes[USER_XSTATE_FX_SW_WORDS];

arch/x86/include/asm/processor.h

+1 −0

Original line number	Diff line number	Diff line
		@@ -368,6 +368,7 @@ DECLARE_PER_CPU(struct irq_stack *, softirq_stack);
		#endif /* X86_64 */

		extern unsigned int xstate_size;
		extern unsigned int fpu_user_xstate_size;

		struct perf_event;

arch/x86/kernel/fpu/init.c

+4 −1

Original line number	Diff line number	Diff line
		@@ -195,7 +195,7 @@ static void __init fpu__init_task_struct_size(void)
		}

		/*
		* Set up the xstate_size based on the legacy FPU context size.
		* Set up the user and kernel xstate_size based on the legacy FPU context size.
		*
		* We set this up first, and later it will be overwritten by
		* fpu__init_system_xstate() if the CPU knows about xstates.
		@@ -226,6 +226,9 @@ static void __init fpu__init_system_xstate_size_legacy(void)
		else
		xstate_size = sizeof(struct fregs_state);
		}

		fpu_user_xstate_size = xstate_size;

		/*
		* Quirk: we don't yet handle the XSAVES* instructions
		* correctly, as we don't correctly convert between

arch/x86/kernel/fpu/signal.c

+20 −7

Original line number	Diff line number	Diff line
		@@ -32,7 +32,7 @@ static inline int check_for_xstate(struct fxregs_state __user *buf,
		/* Check for the first magic field and other error scenarios. */
		if (fx_sw->magic1 != FP_XSTATE_MAGIC1 \|\|
		fx_sw->xstate_size < min_xstate_size \|\|
		fx_sw->xstate_size > xstate_size \|\|
		fx_sw->xstate_size > fpu_user_xstate_size \|\|
		fx_sw->xstate_size > fx_sw->extended_size)
		return -1;

		@@ -89,7 +89,8 @@ static inline int save_xstate_epilog(void __user *buf, int ia32_frame)
		if (!use_xsave())
		return err;

		err \|= __put_user(FP_XSTATE_MAGIC2, (__u32 *)(buf + xstate_size));
		err \|= __put_user(FP_XSTATE_MAGIC2,
		(__u32 *)(buf + fpu_user_xstate_size));

		/*
		* Read the xfeatures which we copied (directly from the cpu or
		@@ -126,7 +127,7 @@ static inline int copy_fpregs_to_sigframe(struct xregs_state __user *buf)
		else
		err = copy_fregs_to_user((struct fregs_state __user *) buf);

		if (unlikely(err) && __clear_user(buf, xstate_size))
		if (unlikely(err) && __clear_user(buf, fpu_user_xstate_size))
		err = -EFAULT;
		return err;
		}
		@@ -176,8 +177,19 @@ int copy_fpstate_to_sigframe(void __user buf, void __user buf_fx, int size)
		if (ia32_fxstate)
		copy_fxregs_to_kernel(&tsk->thread.fpu);
		} else {
		/*
		* It is a bug if kernel uses compacted-format for xsave
		* area and we copy it out directly to a signal frame. It
		* should have been handled above by saving the registers
		* directly.
		*/
		if (boot_cpu_has(X86_FEATURE_XSAVES)) {
		WARN_ONCE(1, "x86/fpu: saving compacted-format xsave area to a signal frame!\n");
		return -1;
		}

		fpstate_sanitize_xstate(&tsk->thread.fpu);
		if (__copy_to_user(buf_fx, xsave, xstate_size))
		if (__copy_to_user(buf_fx, xsave, fpu_user_xstate_size))
		return -1;
		}

		@@ -344,7 +356,8 @@ static int __fpu__restore_sig(void __user buf, void __user buf_fx, int size)

		static inline int xstate_sigframe_size(void)
		{
		return use_xsave() ? xstate_size + FP_XSTATE_MAGIC2_SIZE : xstate_size;
		return use_xsave() ? fpu_user_xstate_size + FP_XSTATE_MAGIC2_SIZE :
		fpu_user_xstate_size;
		}

		/*
		@@ -388,12 +401,12 @@ fpu__alloc_mathframe(unsigned long sp, int ia32_frame,
		*/
		void fpu__init_prepare_fx_sw_frame(void)
		{
		int size = xstate_size + FP_XSTATE_MAGIC2_SIZE;
		int size = fpu_user_xstate_size + FP_XSTATE_MAGIC2_SIZE;

		fx_sw_reserved.magic1 = FP_XSTATE_MAGIC1;
		fx_sw_reserved.extended_size = size;
		fx_sw_reserved.xfeatures = xfeatures_mask;
		fx_sw_reserved.xstate_size = xstate_size;
		fx_sw_reserved.xstate_size = fpu_user_xstate_size;

		if (config_enabled(CONFIG_IA32_EMULATION) \|\|
		config_enabled(CONFIG_X86_32)) {

arch/x86/kernel/fpu/xstate.c

+48 −28

Original line number	Diff line number	Diff line
		@@ -43,6 +43,13 @@ static unsigned int xstate_offsets[XFEATURE_MAX] = { [ 0 ... XFEATURE_MAX - 1] =
		static unsigned int xstate_sizes[XFEATURE_MAX] = { [ 0 ... XFEATURE_MAX - 1] = -1};
		static unsigned int xstate_comp_offsets[sizeof(xfeatures_mask)*8];

		/*
		* The XSAVE area of kernel can be in standard or compacted format;
		* it is always in standard format for user mode. This is the user
		* mode standard format size used for signal and ptrace frames.
		*/
		unsigned int fpu_user_xstate_size;

		/*
		* Clear all of the X86_FEATURE_* bits that are unavailable
		* when the CPU has no XSAVE support.
		@@ -171,7 +178,7 @@ void fpstate_sanitize_xstate(struct fpu *fpu)
		*/
		while (xfeatures) {
		if (xfeatures & 0x1) {
		int offset = xstate_offsets[feature_bit];
		int offset = xstate_comp_offsets[feature_bit];
		int size = xstate_sizes[feature_bit];

		memcpy((void *)fx + offset,
		@@ -533,8 +540,9 @@ static void do_extra_xstate_size_checks(void)
		XSTATE_WARN_ON(paranoid_xstate_size != xstate_size);
		}


		/*
		* Calculate total size of enabled xstates in XCR0/xfeatures_mask.
		* Get total size of enabled xstates in XCR0/xfeatures_mask.
		*
		* Note the SDM's wording here. "sub-function 0" only enumerates
		* the size of the user states. If we use it to size a buffer
		@@ -544,22 +552,9 @@ static void do_extra_xstate_size_checks(void)
		* Note that we do not currently set any bits on IA32_XSS so
		* 'XCR0 \| IA32_XSS == XCR0' for now.
		*/
		static unsigned int __init calculate_xstate_size(void)
		static unsigned int __init get_xsaves_size(void)
		{
		unsigned int eax, ebx, ecx, edx;
		unsigned int calculated_xstate_size;

		if (!boot_cpu_has(X86_FEATURE_XSAVES)) {
		/*
		* - CPUID function 0DH, sub-function 0:
		* EBX enumerates the size (in bytes) required by
		* the XSAVE instruction for an XSAVE area
		* containing all the user state components
		* corresponding to bits currently set in XCR0.
		*/
		cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx);
		calculated_xstate_size = ebx;
		} else {
		/*
		* - CPUID function 0DH, sub-function 1:
		* EBX enumerates the size (in bytes) required by
		@@ -569,9 +564,21 @@ static unsigned int __init calculate_xstate_size(void)
		* XCR0 \| IA32_XSS.
		*/
		cpuid_count(XSTATE_CPUID, 1, &eax, &ebx, &ecx, &edx);
		calculated_xstate_size = ebx;
		return ebx;
		}
		return calculated_xstate_size;

		static unsigned int __init get_xsave_size(void)
		{
		unsigned int eax, ebx, ecx, edx;
		/*
		* - CPUID function 0DH, sub-function 0:
		* EBX enumerates the size (in bytes) required by
		* the XSAVE instruction for an XSAVE area
		* containing all the user state components
		* corresponding to bits currently set in XCR0.
		*/
		cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx);
		return ebx;
		}

		/*
		@@ -591,7 +598,15 @@ static bool is_supported_xstate_size(unsigned int test_xstate_size)
		static int init_xstate_size(void)
		{
		/* Recompute the context size for enabled features: */
		unsigned int possible_xstate_size = calculate_xstate_size();
		unsigned int possible_xstate_size;
		unsigned int xsave_size;

		xsave_size = get_xsave_size();

		if (boot_cpu_has(X86_FEATURE_XSAVES))
		possible_xstate_size = get_xsaves_size();
		else
		possible_xstate_size = xsave_size;

		/* Ensure we have the space to store all enabled: */
		if (!is_supported_xstate_size(possible_xstate_size))
		@@ -603,6 +618,11 @@ static int init_xstate_size(void)
		*/
		xstate_size = possible_xstate_size;
		do_extra_xstate_size_checks();

		/*
		* User space is always in standard format.
		*/
		fpu_user_xstate_size = xsave_size;
		return 0;
		}