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Commit a10a91c5 authored Apr 25, 2020 by Mao Jinlong Committed by Gerrit - the friendly Code Review server Apr 24, 2020

defconfig: Disable CTI save function on perf build for lahaina



Disable CTI save function on perf build to avoid the power and performance
issue.

Change-Id: Ic1a758418072248fa898e012ddb6f8d556efff22
Signed-off-by: Mao Jinlong <jinlmao@codeaurora.org>

parent a22aea40

arch/arm64/configs/vendor/lahaina_QGKI.config

+1 −1

Original line number	Diff line number	Diff line
		@@ -88,6 +88,7 @@ CONFIG_CLD_LL_CORE=y
		CONFIG_CORESIGHT_QGKI=y
		CONFIG_CORESIGHT_LINK_AND_SINK_TMC=y
		CONFIG_CORESIGHT_CTI=y
		CONFIG_CORESIGHT_CTI_SAVE_DISABLE=y
		CONFIG_CORESIGHT_TPDA=y
		CONFIG_CORESIGHT_TPDM=y
		CONFIG_CORESIGHT_HWEVENT=y
		@@ -97,7 +98,6 @@ CONFIG_CORESIGHT_TGU=y
		CONFIG_AUDIO_QGKI=y
		CONFIG_QCOM_FSA4480_I2C=y
		# CONFIG_CORESIGHT_CATU is not set
		# CONFIG_CORESIGHT_CTI_SAVE_DISABLE is not set
		# CONFIG_CORESIGHT_TPDM_DEFAULT_ENABLE is not set
		CONFIG_BTFM_SLIM=m
		# CONFIG_SND_SOC_WCD9335 is not set

arch/arm64/configs/vendor/lahaina_debug.config

+1 −0

Original line number	Diff line number	Diff line
		@@ -53,6 +53,7 @@ CONFIG_I3C_MASTER_MSM_GENI=y
		# CONFIG_CDNS_I3C_MASTER is not set
		# CONFIG_DW_I3C_MASTER is not set
		CONFIG_CORESIGHT_SOURCE_ETM4X=y
		# CONFIG_CORESIGHT_CTI_SAVE_DISABLE is not set
		CONFIG_MHI_BUS=y
		CONFIG_MHI_DEBUG=y
		CONFIG_MHI_UCI=y