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Commit a0aff6fc authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "msm: kgsl: Set up the adreno device at runtime"

parents 140cc17e 5dadc085

drivers/gpu/msm/adreno.c

+50 −79
Original line number Diff line number Diff line
@@ -32,43 +32,7 @@ static void adreno_input_work(struct work_struct *work); 
static unsigned int counter_delta(struct kgsl_device *device,

	unsigned int reg, unsigned int *counter);



static struct devfreq_msm_adreno_tz_data adreno_tz_data = {

	.bus = {

		.max = 350,

		.floating = true,

	},

	.device_id = 0,

};



static const struct kgsl_functable adreno_functable;



static struct adreno_device device_3d0 = {

	.dev = {

		KGSL_DEVICE_COMMON_INIT(device_3d0.dev),

		.pwrscale = KGSL_PWRSCALE_INIT(&adreno_tz_data),

		.name = DEVICE_3D0_NAME,

		.id = 0,

		.iomemname = "kgsl_3d0_reg_memory",

		.ftbl = &adreno_functable,

	},

	.ft_policy = KGSL_FT_DEFAULT_POLICY,

	.ft_pf_policy = KGSL_FT_PAGEFAULT_DEFAULT_POLICY,

	.long_ib_detect = 1,

	.input_work = __WORK_INITIALIZER(device_3d0.input_work,

		adreno_input_work),

	.pwrctrl_flag = BIT(ADRENO_SPTP_PC_CTRL) |

		BIT(ADRENO_THROTTLING_CTRL) | BIT(ADRENO_HWCG_CTRL),

	.profile.enabled = false,

	.active_list = LIST_HEAD_INIT(device_3d0.active_list),

	.active_list_lock = __SPIN_LOCK_UNLOCKED(device_3d0.active_list_lock),

	.gpu_llc_slice_enable = true,

	.gpuhtw_llc_slice_enable = true,

	.preempt = {

		.preempt_level = 1,

		.skipsaverestore = 1,

		.usesgmem = 1,

	},

};

static struct adreno_device device_3d0;



/* Ptr to array for the current set of fault detect registers */

unsigned int *adreno_ft_regs;
@@ -858,7 +822,7 @@ static int adreno_identify_gpu(struct adreno_device *adreno_dev) 
}



static const struct platform_device_id adreno_id_table[] = {

	{ DEVICE_3D0_NAME, (unsigned long) &device_3d0, },

	{ "kgsl-3d0", (unsigned long) &device_3d0, },

	{},

};
@@ -1140,7 +1104,8 @@ static int adreno_of_get_power(struct adreno_device *adreno_dev, 


	/* Get starting physical address of device registers */

	res = platform_get_resource_byname(device->pdev, IORESOURCE_MEM,

					   device->iomemname);

		"kgsl_3d0_reg_memory");



	if (res == NULL) {

		dev_err(device->dev,

			     "platform_get_resource_byname failed\n");
@@ -1356,6 +1321,47 @@ static int adreno_probe_efuse(struct platform_device *pdev, 
	return 0;

}



static const struct kgsl_functable adreno_functable;



static void adreno_setup_device(struct adreno_device *adreno_dev)

{

	memset(adreno_dev, 0, sizeof(*adreno_dev));



	adreno_dev->dev.name = "kgsl-3d0";

	adreno_dev->dev.ftbl = &adreno_functable;



	init_completion(&adreno_dev->dev.hwaccess_gate);

	init_completion(&adreno_dev->dev.halt_gate);



	idr_init(&adreno_dev->dev.context_idr);



	mutex_init(&adreno_dev->dev.mutex);

	INIT_LIST_HEAD(&adreno_dev->dev.globals);



	/* Set the fault tolerance policy to replay, skip, throttle */

	adreno_dev->ft_policy = BIT(KGSL_FT_REPLAY) |

		BIT(KGSL_FT_SKIPCMD) | BIT(KGSL_FT_THROTTLE);



	/* Enable command timeouts by default */

	adreno_dev->long_ib_detect = true;



	INIT_WORK(&adreno_dev->input_work, adreno_input_work);



	/*

	 * Enable SPTP power collapse, throttling and hardware clock gating by

	 * default where applicable

	 */

	adreno_dev->pwrctrl_flag = BIT(ADRENO_SPTP_PC_CTRL) |

		BIT(ADRENO_THROTTLING_CTRL) | BIT(ADRENO_HWCG_CTRL);



	INIT_LIST_HEAD(&adreno_dev->active_list);

	spin_lock_init(&adreno_dev->active_list_lock);



	/* Enable use of the LLC slices where applicable */

	adreno_dev->gpu_llc_slice_enable = true;

	adreno_dev->gpuhtw_llc_slice_enable = true;

}



static int adreno_probe(struct platform_device *pdev)

{

	const struct of_device_id *of_id;
@@ -1370,6 +1376,10 @@ static int adreno_probe(struct platform_device *pdev) 
		return -EINVAL;



	adreno_dev = (struct adreno_device *) of_id->data;



	/* Initialize the adreno device structure */

	adreno_setup_device(adreno_dev);



	device = KGSL_DEVICE(adreno_dev);



	device->pdev = pdev;
@@ -3750,35 +3760,6 @@ static struct platform_driver adreno_platform_driver = { 
	}

};



static const struct of_device_id busmon_match_table[] = {

	{ .compatible = "qcom,kgsl-busmon", .data = &device_3d0 },

	{}

};



static int adreno_busmon_probe(struct platform_device *pdev)

{

	struct kgsl_device *device;

	const struct of_device_id *pdid =

			of_match_device(busmon_match_table, &pdev->dev);



	if (pdid == NULL)

		return -ENXIO;



	device = (struct kgsl_device *)pdid->data;

	device->busmondev = &pdev->dev;

	dev_set_drvdata(device->busmondev, device);



	return 0;

}



static struct platform_driver kgsl_bus_platform_driver = {

	.probe = adreno_busmon_probe,

	.driver = {

		.name = "kgsl-busmon",

		.of_match_table = busmon_match_table,

	}

};



static int __init kgsl_3d_init(void)

{

	int ret;
@@ -3787,17 +3768,9 @@ static int __init kgsl_3d_init(void) 
	if (ret)

		return ret;



	ret = platform_driver_register(&kgsl_bus_platform_driver);

	if (ret) {

		kgsl_core_exit();

		return ret;

	}



	ret = platform_driver_register(&adreno_platform_driver);

	if (ret) {

		platform_driver_unregister(&kgsl_bus_platform_driver);

	if (ret)

		kgsl_core_exit();

	}



	return ret;

}
@@ -3805,8 +3778,6 @@ static int __init kgsl_3d_init(void) 
static void __exit kgsl_3d_exit(void)

{

	platform_driver_unregister(&adreno_platform_driver);

	platform_driver_unregister(&kgsl_bus_platform_driver);



	kgsl_core_exit();

}

drivers/gpu/msm/adreno.h

+8 −15
Original line number Diff line number Diff line
@@ -13,8 +13,6 @@ 
#include "adreno_ringbuffer.h"

#include "kgsl_sharedmem.h"



#define DEVICE_3D0_NAME "kgsl-3d0"



/* ADRENO_DEVICE - Given a kgsl_device return the adreno device struct */

#define ADRENO_DEVICE(device) \

		container_of(device, struct adreno_device, dev)
@@ -476,7 +474,7 @@ struct adreno_device { 
	struct adreno_ringbuffer *prev_rb;

	unsigned int fast_hang_detect;

	unsigned long ft_policy;

	unsigned int long_ib_detect;

	bool long_ib_detect;

	unsigned long ft_pf_policy;

	bool cooperative_reset;

	struct adreno_profile profile;
@@ -839,13 +837,13 @@ struct adreno_gpudev { 
 */

enum kgsl_ft_policy_bits {

	KGSL_FT_OFF = 0,

	KGSL_FT_REPLAY = 1,

	KGSL_FT_SKIPIB = 2,

	KGSL_FT_SKIPFRAME = 3,

	KGSL_FT_DISABLE = 4,

	KGSL_FT_TEMP_DISABLE = 5,

	KGSL_FT_THROTTLE = 6,

	KGSL_FT_SKIPCMD = 7,

	KGSL_FT_REPLAY,

	KGSL_FT_SKIPIB,

	KGSL_FT_SKIPFRAME,

	KGSL_FT_DISABLE,

	KGSL_FT_TEMP_DISABLE,

	KGSL_FT_THROTTLE,

	KGSL_FT_SKIPCMD,

	/* KGSL_FT_MAX_BITS is used to calculate the mask */

	KGSL_FT_MAX_BITS,

	/* Internal bits - set during GFT */
@@ -855,11 +853,6 @@ enum kgsl_ft_policy_bits { 


#define KGSL_FT_POLICY_MASK GENMASK(KGSL_FT_MAX_BITS - 1, 0)



#define  KGSL_FT_DEFAULT_POLICY \

	(BIT(KGSL_FT_REPLAY) | \

	 BIT(KGSL_FT_SKIPCMD) | \

	 BIT(KGSL_FT_THROTTLE))



/**

 * enum kgsl_ft_pagefault_policy_bits - KGSL pagefault policy bits

 * @KGSL_FT_PAGEFAULT_INT_ENABLE: No longer used, but retained for compatibility

drivers/gpu/msm/adreno_a6xx.c

+4 −0
Original line number Diff line number Diff line
@@ -2205,6 +2205,10 @@ static void a6xx_platform_setup(struct adreno_device *adreno_dev) 
{

	struct adreno_gpudev *gpudev = ADRENO_GPU_DEVICE(adreno_dev);



	adreno_dev->preempt.preempt_level = 1;

	adreno_dev->preempt.skipsaverestore = true;

	adreno_dev->preempt.usesgmem = true;



	if (adreno_has_gbif(adreno_dev)) {

		a6xx_perfcounter_groups[KGSL_PERFCOUNTER_GROUP_VBIF].regs =

				a6xx_perfcounters_gbif;

drivers/gpu/msm/adreno_a6xx_preempt.c

+10 −4
Original line number Diff line number Diff line
@@ -210,10 +210,6 @@ void a6xx_preemption_trigger(struct adreno_device *adreno_dev) 
	unsigned long flags;

	struct adreno_preemption *preempt = &adreno_dev->preempt;



	cntl = (((preempt->preempt_level << 6) & 0xC0) |

		((preempt->skipsaverestore << 9) & 0x200) |

		((preempt->usesgmem << 8) & 0x100) | 0x1);



	/* Put ourselves into a possible trigger state */

	if (!adreno_move_preempt_state(adreno_dev,

		ADRENO_PREEMPT_NONE, ADRENO_PREEMPT_START))
@@ -352,6 +348,16 @@ void a6xx_preemption_trigger(struct adreno_device *adreno_dev) 
	mod_timer(&adreno_dev->preempt.timer,

		jiffies + msecs_to_jiffies(ADRENO_PREEMPT_TIMEOUT));



	cntl = (preempt->preempt_level << 6) | 0x01;



	/* Skip save/restore during L1 preemption */

	if (preempt->skipsaverestore)

		cntl |= (1 << 9);



	/* Enable GMEM save/restore across preemption */

	if (preempt->usesgmem)

		cntl |= (1 << 8);



	trace_adreno_preempt_trigger(adreno_dev->cur_rb, adreno_dev->next_rb,

		cntl);

drivers/gpu/msm/adreno_sysfs.c

+3 −3
Original line number Diff line number Diff line
@@ -50,7 +50,7 @@ static int _usesgmem_store(struct adreno_device *adreno_dev, bool val) 
{

	struct adreno_preemption *preempt = &adreno_dev->preempt;



	preempt->usesgmem = val ? 1 : 0;

	preempt->usesgmem = val ? true : false;

	return 0;

}
@@ -63,7 +63,7 @@ static int _skipsaverestore_store(struct adreno_device *adreno_dev, bool val) 
{

	struct adreno_preemption *preempt = &adreno_dev->preempt;



	preempt->skipsaverestore = val ? 1 : 0;

	preempt->skipsaverestore = val ? true : false;

	return 0;

}
@@ -124,7 +124,7 @@ static bool _gpuhtw_llc_slice_enable_show(struct adreno_device *adreno_dev) 


static int _ft_long_ib_detect_store(struct adreno_device *adreno_dev, bool val)

{

	adreno_dev->long_ib_detect = val;

	adreno_dev->long_ib_detect = val ? true : false;

	return 0;

}