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Commit a074f0e8 authored by Chris Dearman's avatar Chris Dearman Committed by Ralf Baechle
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MIPS: SPRAM: Clean up support code a little



Signed-off-by: default avatarChris Dearman <chris@mips.com>
Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent a4e7cac1
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+10 −0
Original line number Diff line number Diff line
#ifndef _MIPS_SPRAM_H
#define _MIPS_SPRAM_H

#ifdef CONFIG_CPU_MIPSR2
extern __init void spram_config(void);
#else
static inline void spram_config(void) { };
#endif /* CONFIG_CPU_MIPSR2 */

#endif /* _MIPS_SPRAM_H */
+1 −7
Original line number Diff line number Diff line
@@ -23,7 +23,7 @@
#include <asm/mipsregs.h>
#include <asm/system.h>
#include <asm/watch.h>

#include <asm/spram.h>
/*
 * Not all of the MIPS CPUs have the "wait" instruction available. Moreover,
 * the implementation of the "wait" feature differs between CPU families. This
@@ -711,12 +711,6 @@ static void __cpuinit decode_configs(struct cpuinfo_mips *c)
	mips_probe_watch_registers(c);
}

#ifdef CONFIG_CPU_MIPSR2
extern void spram_config(void);
#else
static inline void spram_config(void) {}
#endif

static inline void cpu_probe_mips(struct cpuinfo_mips *c, unsigned int cpu)
{
	decode_configs(c);
+1 −3
Original line number Diff line number Diff line
@@ -13,7 +13,6 @@
#include <linux/ptrace.h>
#include <linux/stddef.h>

#include <asm/cpu.h>
#include <asm/fpu.h>
#include <asm/mipsregs.h>
#include <asm/system.h>
@@ -198,8 +197,7 @@ static __cpuinit void probe_spram(char *type,
		offset += 2 * SPRAM_TAG_STRIDE;
	}
}

__cpuinit void spram_config(void)
void __cpuinit spram_config(void)
{
	struct cpuinfo_mips *c = &current_cpu_data;
	unsigned int config0;