Loading arch/mips/kernel/syscall.c +3 −0 Original line number Diff line number Diff line Loading @@ -26,6 +26,7 @@ #include <linux/msg.h> #include <linux/shm.h> #include <linux/compiler.h> #include <linux/module.h> #include <asm/branch.h> #include <asm/cachectl.h> Loading Loading @@ -56,6 +57,8 @@ asmlinkage int sys_pipe(nabi_no_regargs volatile struct pt_regs regs) unsigned long shm_align_mask = PAGE_SIZE - 1; /* Sane caches */ EXPORT_SYMBOL(shm_align_mask); #define COLOUR_ALIGN(addr,pgoff) \ ((((addr) + shm_align_mask) & ~shm_align_mask) + \ (((pgoff) << PAGE_SHIFT) & shm_align_mask)) Loading arch/mips/mm/cache.c +2 −0 Original line number Diff line number Diff line Loading @@ -33,6 +33,8 @@ void (*flush_cache_sigtramp)(unsigned long addr); void (*flush_data_cache_page)(unsigned long addr); void (*flush_icache_all)(void); EXPORT_SYMBOL(flush_data_cache_page); #ifdef CONFIG_DMA_NONCOHERENT /* DMA cache operations. */ Loading Loading
arch/mips/kernel/syscall.c +3 −0 Original line number Diff line number Diff line Loading @@ -26,6 +26,7 @@ #include <linux/msg.h> #include <linux/shm.h> #include <linux/compiler.h> #include <linux/module.h> #include <asm/branch.h> #include <asm/cachectl.h> Loading Loading @@ -56,6 +57,8 @@ asmlinkage int sys_pipe(nabi_no_regargs volatile struct pt_regs regs) unsigned long shm_align_mask = PAGE_SIZE - 1; /* Sane caches */ EXPORT_SYMBOL(shm_align_mask); #define COLOUR_ALIGN(addr,pgoff) \ ((((addr) + shm_align_mask) & ~shm_align_mask) + \ (((pgoff) << PAGE_SHIFT) & shm_align_mask)) Loading
arch/mips/mm/cache.c +2 −0 Original line number Diff line number Diff line Loading @@ -33,6 +33,8 @@ void (*flush_cache_sigtramp)(unsigned long addr); void (*flush_data_cache_page)(unsigned long addr); void (*flush_icache_all)(void); EXPORT_SYMBOL(flush_data_cache_page); #ifdef CONFIG_DMA_NONCOHERENT /* DMA cache operations. */ Loading