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Commit 9fe88d04 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: Remove support for PCIE1 and USB3_SEC clocks on YUPIK HSP"

parents 7bc74179 3aac9d78
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+15 −11
Original line number Diff line number Diff line
@@ -5,26 +5,30 @@
&gcc {
	clocks = <&rpmhcc RPMH_CXO_CLK>, <&sleep_clk>,
		<&usb3_phy_wrapper_gcc_usb30_pipe_clk>,
		<&pcie_0_pipe_clk>, <&pcie_1_pipe_clk>;
		<&pcie_0_pipe_clk>;
	clock-names = "bi_tcxo", "sleep_clk",
		"usb3_phy_wrapper_gcc_usb30_pipe_clk",
		"pcie_0_pipe_clk", "pcie_1_pipe_clk";
		"pcie_0_pipe_clk";

	/delete-property/ protected-clocks;
	protected-clocks = <GCC_AGGRE_NOC_PCIE_1_AXI_CLK>,
	<GCC_PCIE1_PHY_RCHNG_CLK>, <GCC_PCIE_1_AUX_CLK>,
	<GCC_PCIE_1_AUX_CLK_SRC>, <GCC_PCIE_1_CFG_AHB_CLK>,
	<GCC_PCIE_1_MSTR_AXI_CLK>, <GCC_PCIE_1_PHY_RCHNG_CLK_SRC>,
	<GCC_PCIE_1_PIPE_CLK>, <GCC_PCIE_1_PIPE_CLK_SRC>,
	<GCC_PCIE_1_SLV_AXI_CLK>, <GCC_PCIE_1_SLV_Q2A_AXI_CLK>,
	<GCC_AGGRE_USB3_SEC_AXI_CLK>, <GCC_CFG_NOC_USB3_SEC_AXI_CLK>,
	<GCC_USB30_SEC_MASTER_CLK>, <GCC_USB30_SEC_MASTER_CLK_SRC>,
	<GCC_USB30_SEC_MOCK_UTMI_CLK>, <GCC_USB30_SEC_MOCK_UTMI_CLK_SRC>,
	<GCC_USB30_SEC_MOCK_UTMI_POSTDIV_CLK_SRC>, <GCC_USB30_SEC_SLEEP_CLK>,
	<GCC_USB3_SEC_PHY_AUX_CLK>, <GCC_USB3_SEC_PHY_AUX_CLK_SRC>,
	<GCC_USB3_SEC_PHY_COM_AUX_CLK>, <GCC_USB3_SEC_PHY_PIPE_CLK>,
	<GCC_USB3_SEC_PHY_PIPE_CLK_SRC>;
};

&gcc_pcie_0_gdsc {
	status = "ok";
};

&gcc_pcie_1_gdsc {
	status = "ok";
};

&gcc_usb30_sec_gdsc {
	status = "ok";
};

&bluetooth {
	compatible = "qcom,qca6490";
};