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Commit 9fb7dc73 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-next-5.3-2019-07-18' of git://people.freedesktop.org/~agd5f/linux into drm-next 



drm-next-5.3-2019-07-18:

amdgpu:
- Navi DC fix for secondary adapters
- Fix Navi flickering with high res panels
- Navi SMU fixes
- Vega20 SMU fixes
- Fixes for audio hotplug on HG systems
- Fix for potential integer overflows on large buffer
  migrations
- debugfs fixes for umr
- Various other small fixes

amdkfd:
- Apply noretry setting consistently
- Fix hang in eviction
- Properly clean up GWS on uninit

UAPI:
- clarify a comment on ctx priority

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
From: Alex Deucher <alexdeucher@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190718211525.3374-1-alexander.deucher@amd.com
parents b3c8a40c 41a5a2a8

drivers/gpu/drm/amd/amdgpu/amdgpu.h

+1 −0
Original line number Diff line number Diff line
@@ -164,6 +164,7 @@ extern int amdgpu_async_gfx_ring; 
extern int amdgpu_mcbp;

extern int amdgpu_discovery;

extern int amdgpu_mes;

extern int amdgpu_noretry;



#ifdef CONFIG_DRM_AMDGPU_SI

extern int amdgpu_si_support;

drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c

+5 −4
Original line number Diff line number Diff line
@@ -106,10 +106,10 @@ static int amdgpu_debugfs_process_reg_op(bool read, struct file *f, 
	ssize_t result = 0;

	int r;

	bool pm_pg_lock, use_bank, use_ring;

	unsigned instance_bank, sh_bank, se_bank, me, pipe, queue;

	unsigned instance_bank, sh_bank, se_bank, me, pipe, queue, vmid;



	pm_pg_lock = use_bank = use_ring = false;

	instance_bank = sh_bank = se_bank = me = pipe = queue = 0;

	instance_bank = sh_bank = se_bank = me = pipe = queue = vmid = 0;



	if (size & 0x3 || *pos & 0x3 ||

			((*pos & (1ULL << 62)) && (*pos & (1ULL << 61))))
@@ -135,6 +135,7 @@ static int amdgpu_debugfs_process_reg_op(bool read, struct file *f, 
		me = (*pos & GENMASK_ULL(33, 24)) >> 24;

		pipe = (*pos & GENMASK_ULL(43, 34)) >> 34;

		queue = (*pos & GENMASK_ULL(53, 44)) >> 44;

		vmid = (*pos & GENMASK_ULL(58, 54)) >> 54;



		use_ring = 1;

	} else {
@@ -152,7 +153,7 @@ static int amdgpu_debugfs_process_reg_op(bool read, struct file *f, 
					sh_bank, instance_bank);

	} else if (use_ring) {

		mutex_lock(&adev->srbm_mutex);

		amdgpu_gfx_select_me_pipe_q(adev, me, pipe, queue);

		amdgpu_gfx_select_me_pipe_q(adev, me, pipe, queue, vmid);

	}



	if (pm_pg_lock)
@@ -185,7 +186,7 @@ static int amdgpu_debugfs_process_reg_op(bool read, struct file *f, 
		amdgpu_gfx_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff);

		mutex_unlock(&adev->grbm_idx_mutex);

	} else if (use_ring) {

		amdgpu_gfx_select_me_pipe_q(adev, 0, 0, 0);

		amdgpu_gfx_select_me_pipe_q(adev, 0, 0, 0, 0);

		mutex_unlock(&adev->srbm_mutex);

	}

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

+1 −0
Original line number Diff line number Diff line
@@ -2537,6 +2537,7 @@ int amdgpu_device_init(struct amdgpu_device *adev, 
	hash_init(adev->mn_hash);

	mutex_init(&adev->lock_reset);

	mutex_init(&adev->virt.dpm_mutex);

	mutex_init(&adev->psp.mutex);



	r = amdgpu_device_check_arguments(adev);

	if (r)

drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c

+1 −1
Original line number Diff line number Diff line
@@ -123,7 +123,7 @@ static int hw_id_map[MAX_HWIP] = { 
	[UVD_HWIP]	= UVD_HWID,

	[VCE_HWIP]	= VCE_HWID,

	[DF_HWIP]	= DF_HWID,

	[DCE_HWIP]	= DCEAZ_HWID,

	[DCE_HWIP]	= DMU_HWID,

	[OSSSYS_HWIP]	= OSSSYS_HWID,

	[SMUIO_HWIP]	= SMUIO_HWID,

	[PWR_HWIP]	= PWR_HWID,

drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c

+7 −12
Original line number Diff line number Diff line
@@ -140,8 +140,9 @@ uint amdgpu_smu_memory_pool_size = 0; 
uint amdgpu_dc_feature_mask = 0;

int amdgpu_async_gfx_ring = 1;

int amdgpu_mcbp = 0;

int amdgpu_discovery = 0;

int amdgpu_discovery = -1;

int amdgpu_mes = 0;

int amdgpu_noretry;



struct amdgpu_mgpu_info mgpu_info = {

	.mutex = __MUTEX_INITIALIZER(mgpu_info.mutex),
@@ -593,6 +594,7 @@ module_param_named(mcbp, amdgpu_mcbp, int, 0444); 
/**

 * DOC: discovery (int)

 * Allow driver to discover hardware IP information from IP Discovery table at the top of VRAM.

 * (-1 = auto (default), 0 = disabled, 1 = enabled)

 */

MODULE_PARM_DESC(discovery,

	"Allow driver to discover hardware IPs from IP Discovery table at the top of VRAM");
@@ -607,6 +609,10 @@ MODULE_PARM_DESC(mes, 
	"Enable Micro Engine Scheduler (0 = disabled (default), 1 = enabled)");

module_param_named(mes, amdgpu_mes, int, 0444);



MODULE_PARM_DESC(noretry,

	"Disable retry faults (0 = retry enabled (default), 1 = retry disabled)");

module_param_named(noretry, amdgpu_noretry, int, 0644);



#ifdef CONFIG_HSA_AMD

/**

 * DOC: sched_policy (int)
@@ -682,17 +688,6 @@ module_param(ignore_crat, int, 0444); 
MODULE_PARM_DESC(ignore_crat,

	"Ignore CRAT table during KFD initialization (0 = use CRAT (default), 1 = ignore CRAT)");



/**

 * DOC: noretry (int)

 * This parameter sets sh_mem_config.retry_disable. Default value, 0, enables retry.

 * Setting 1 disables retry.

 * Retry is needed for recoverable page faults.

 */

int noretry;

module_param(noretry, int, 0644);

MODULE_PARM_DESC(noretry,

	"Set sh_mem_config.retry_disable on Vega10 (0 = retry enabled (default), 1 = retry disabled)");



/**

 * DOC: halt_if_hws_hang (int)

 * Halt if HWS hang is detected. Default value, 0, disables the halt on hang.