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Commit 9f8ad4f9 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "dwc3: core: Add ssp u3 u0 link state related quirk"

parents c98a527d 8e0f01a7

drivers/usb/dwc3/core.c

+6 −0
Original line number Diff line number Diff line
@@ -639,6 +639,10 @@ static int dwc3_phy_setup(struct dwc3 *dwc) 
	if (dwc->dis_del_phy_power_chg_quirk)

		reg &= ~DWC3_GUSB3PIPECTL_DEPOCHANGE;



	if (dwc->ssp_u3_u0_quirk)

		reg |= (DWC3_GUSB3PIPECTL_UX_EXIT_PX |

			DWC3_GUSB3PIPECTL_P3EXSIGP2);



	dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg);



	reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
@@ -1403,6 +1407,8 @@ static void dwc3_get_properties(struct dwc3 *dwc) 


	dwc->dis_metastability_quirk = device_property_read_bool(dev,

				"snps,dis_metastability_quirk");

	dwc->ssp_u3_u0_quirk = device_property_read_bool(dev,

				"snps,ssp-u3-u0-quirk");



	device_property_read_u32(dev, "snps,xhci-imod-value",

			&dwc->xhci_imod_value);

drivers/usb/dwc3/core.h

+3 −0
Original line number Diff line number Diff line
@@ -325,6 +325,7 @@ 
#define DWC3_GUSB3PIPECTL_DEP1P2P3_EN	DWC3_GUSB3PIPECTL_DEP1P2P3(1)

#define DWC3_GUSB3PIPECTL_DEPOCHANGE	BIT(18)

#define DWC3_GUSB3PIPECTL_SUSPHY	BIT(17)

#define DWC3_GUSB3PIPECTL_P3EXSIGP2	BIT(10)

#define DWC3_GUSB3PIPECTL_LFPSFILT	BIT(9)

#define DWC3_GUSB3PIPECTL_RX_DETOPOLL	BIT(8)

#define DWC3_GUSB3PIPECTL_TX_DEEPH_MASK	DWC3_GUSB3PIPECTL_TX_DEEPH(3)
@@ -1116,6 +1117,7 @@ struct dwc3_scratchpad_array { 
 * 	2	- No de-emphasis

 * 	3	- Reserved

 * @dis_metastability_quirk: set to disable metastability quirk.

 * @ssp_u3_u0_quirk: set to enable ss specific u3 to u0 quirk.

 * @err_evt_seen: previous event in queue was erratic error

 * @in_lpm: indicates if controller is in low power mode (no clocks)

 * @irq: irq number
@@ -1333,6 +1335,7 @@ struct dwc3 { 
	unsigned int		vbus_draw;



	unsigned		dis_metastability_quirk:1;

	unsigned		ssp_u3_u0_quirk:1;



	u16			imod_interval;

	u32			xhci_imod_value;