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Commit 9efa6d1a authored by Alexandre TORGUE's avatar Alexandre TORGUE Committed by Linus Walleij
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pinctrl: stm32: set pin to gpio input when used as interrupt 



This patch ensures that pin is correctly set as gpio input when it is used
as an interrupt.

Signed-off-by: default avatarAlexandre TORGUE <alexandre.torgue@st.com>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent adeac775

drivers/pinctrl/stm32/pinctrl-stm32.c

+29 −10
Original line number Original line Diff line number Diff line
@@ -219,12 +219,41 @@ static const struct gpio_chip stm32_gpio_template = { 
	.to_irq			= stm32_gpio_to_irq,

	.to_irq			= stm32_gpio_to_irq,

};

};





static int stm32_gpio_irq_request_resources(struct irq_data *irq_data)

{

	struct stm32_gpio_bank *bank = irq_data->domain->host_data;

	struct stm32_pinctrl *pctl = dev_get_drvdata(bank->gpio_chip.parent);

	int ret;



	ret = stm32_gpio_direction_input(&bank->gpio_chip, irq_data->hwirq);

	if (ret)

		return ret;



	ret = gpiochip_lock_as_irq(&bank->gpio_chip, irq_data->hwirq);

	if (ret) {

		dev_err(pctl->dev, "unable to lock HW IRQ %lu for IRQ\n",

			irq_data->hwirq);

		return ret;

	}



	return 0;

}



static void stm32_gpio_irq_release_resources(struct irq_data *irq_data)

{

	struct stm32_gpio_bank *bank = irq_data->domain->host_data;



	gpiochip_unlock_as_irq(&bank->gpio_chip, irq_data->hwirq);

}



static struct irq_chip stm32_gpio_irq_chip = {

static struct irq_chip stm32_gpio_irq_chip = {

	.name           = "stm32gpio",

	.name           = "stm32gpio",

	.irq_eoi	= irq_chip_eoi_parent,

	.irq_eoi	= irq_chip_eoi_parent,

	.irq_mask       = irq_chip_mask_parent,

	.irq_mask       = irq_chip_mask_parent,

	.irq_unmask     = irq_chip_unmask_parent,

	.irq_unmask     = irq_chip_unmask_parent,

	.irq_set_type   = irq_chip_set_type_parent,

	.irq_set_type   = irq_chip_set_type_parent,

	.irq_request_resources = stm32_gpio_irq_request_resources,

	.irq_release_resources = stm32_gpio_irq_release_resources,

};

};





static int stm32_gpio_domain_translate(struct irq_domain *d,

static int stm32_gpio_domain_translate(struct irq_domain *d,
@@ -248,15 +277,6 @@ static void stm32_gpio_domain_activate(struct irq_domain *d, 
	struct stm32_pinctrl *pctl = dev_get_drvdata(bank->gpio_chip.parent);

	struct stm32_pinctrl *pctl = dev_get_drvdata(bank->gpio_chip.parent);





	regmap_field_write(pctl->irqmux[irq_data->hwirq], bank->bank_nr);

	regmap_field_write(pctl->irqmux[irq_data->hwirq], bank->bank_nr);

	gpiochip_lock_as_irq(&bank->gpio_chip, irq_data->hwirq);

}



static void stm32_gpio_domain_deactivate(struct irq_domain *d,

				       struct irq_data *irq_data)

{

	struct stm32_gpio_bank *bank = d->host_data;



	gpiochip_unlock_as_irq(&bank->gpio_chip, irq_data->hwirq);

}

}





static int stm32_gpio_domain_alloc(struct irq_domain *d,

static int stm32_gpio_domain_alloc(struct irq_domain *d,
@@ -285,7 +305,6 @@ static const struct irq_domain_ops stm32_gpio_domain_ops = { 
	.alloc          = stm32_gpio_domain_alloc,

	.alloc          = stm32_gpio_domain_alloc,

	.free           = irq_domain_free_irqs_common,

	.free           = irq_domain_free_irqs_common,

	.activate	= stm32_gpio_domain_activate,

	.activate	= stm32_gpio_domain_activate,

	.deactivate	= stm32_gpio_domain_deactivate,

};

};





/* Pinctrl functions */

/* Pinctrl functions */