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Commit 9e3803d6 authored by Harshdeep Dhatt's avatar Harshdeep Dhatt
Browse files

msm: kgsl: Add the hwsched platform driver 



This adds the skeleton for the hwsched driver to be
used for dispatching submissions using hwscheduling.

Change-Id: I963fe6b16deb58edab78ab0e9c66fae0d9294b9a
Signed-off-by: default avatarHarshdeep Dhatt <hdhatt@codeaurora.org>
parent ed0ed359

drivers/gpu/msm/Makefile

+2 −0
Original line number Diff line number Diff line
@@ -35,6 +35,8 @@ msm_kgsl-y += \ 
	adreno_a6xx_gmu.o \

	adreno_a6xx_gmu_snapshot.o \

	adreno_a6xx_hfi.o \

	adreno_a6xx_hwsched.o \

	adreno_a6xx_hwsched_hfi.o \

	adreno_a6xx_preempt.o \

	adreno_a6xx_rgmu.o \

	adreno_a6xx_rpmh.o \

drivers/gpu/msm/adreno.h

+1 −0
Original line number Diff line number Diff line
@@ -902,6 +902,7 @@ extern struct adreno_gpudev adreno_a6xx_gmu_gpudev; 
extern struct adreno_gpudev adreno_a6xx_rgmu_gpudev;

extern struct adreno_gpudev adreno_a619_holi_gpudev;

extern struct adreno_gpudev adreno_a630_gpudev;

extern struct adreno_gpudev adreno_a6xx_hwsched_gpudev;



extern int adreno_wake_nice;

extern unsigned int adreno_wake_timeout;

drivers/gpu/msm/adreno_a6xx.c

+20 −1
Original line number Diff line number Diff line
@@ -12,6 +12,7 @@ 


#include "adreno.h"

#include "adreno_a6xx.h"

#include "adreno_a6xx_hwsched.h"

#include "adreno_pm4types.h"

#include "adreno_trace.h"

#include "kgsl_trace.h"
@@ -1085,7 +1086,7 @@ static bool a619_holi_hw_isidle(struct adreno_device *adreno_dev) 
	return (reg & BIT(23)) ? false : true;

}



static bool a6xx_hw_isidle(struct adreno_device *adreno_dev)

bool a6xx_hw_isidle(struct adreno_device *adreno_dev)

{

	struct kgsl_device *device = KGSL_DEVICE(adreno_dev);

	unsigned int reg;
@@ -2804,6 +2805,24 @@ struct adreno_gpudev adreno_a6xx_gpudev = { 
	.power_ops = &adreno_power_operations,

};



struct adreno_gpudev adreno_a6xx_hwsched_gpudev = {

	.reg_offsets = a6xx_register_offsets,

	.probe = a6xx_hwsched_probe,

	.snapshot = a6xx_gmu_snapshot,

	.irq_handler = a6xx_irq_handler,

	.perfcounters = &a6xx_perfcounters,

	.read_throttling_counters = a6xx_read_throttling_counters,

	.iommu_fault_block = a6xx_iommu_fault_block,

	.preemption_context_init = a6xx_preemption_context_init,

	.preemption_context_destroy = a6xx_preemption_context_destroy,

	.perfcounter_update = a6xx_perfcounter_update,

#ifdef CONFIG_QCOM_KGSL_CORESIGHT

	.coresight = {&a6xx_coresight, &a6xx_coresight_cx},

#endif

	.read_alwayson = a6xx_read_alwayson,

	.power_ops = &a6xx_hwsched_power_ops,

};



struct adreno_gpudev adreno_a6xx_gmu_gpudev = {

	.reg_offsets = a6xx_register_offsets,

	.probe = a6xx_gmu_device_probe,

drivers/gpu/msm/adreno_a6xx.h

+9 −0
Original line number Diff line number Diff line
@@ -16,6 +16,7 @@ 
extern const struct adreno_power_ops a6xx_gmu_power_ops;

extern const struct adreno_power_ops a6xx_rgmu_power_ops;

extern const struct adreno_power_ops a630_gmu_power_ops;

extern const struct adreno_power_ops a6xx_hwsched_power_ops;



/**

 * struct a6xx_device - Container for the a6xx_device
@@ -320,4 +321,12 @@ int a6xx_microcode_read(struct adreno_device *adreno_dev); 
int a6xx_probe_common(struct platform_device *pdev,

	struct  adreno_device *adreno_dev, u32 chipid,

	const struct adreno_gpu_core *gpucore);



/**

 * a6xx_hw_isidle - Check whether a6xx gpu is idle or not

 * @adreno_dev: An Adreno GPU handle

 *

 * Return: True if gpu is idle, otherwise false

 */

bool a6xx_hw_isidle(struct adreno_device *adreno_dev);

#endif

drivers/gpu/msm/adreno_a6xx_gmu.c

+27 −27
Original line number Diff line number Diff line
@@ -152,7 +152,7 @@ static void _regwrite(void __iomem *regbase, 
	__raw_writel(value, reg);

}



static void a6xx_load_rsc_ucode(struct adreno_device *adreno_dev)

void a6xx_load_rsc_ucode(struct adreno_device *adreno_dev)

{

	struct kgsl_device *device = KGSL_DEVICE(adreno_dev);

	struct a6xx_gmu_device *gmu = to_a6xx_gmu(adreno_dev);
@@ -197,7 +197,7 @@ static void a6xx_load_rsc_ucode(struct adreno_device *adreno_dev) 
	}

}



static int a6xx_load_pdc_ucode(struct adreno_device *adreno_dev)

int a6xx_load_pdc_ucode(struct adreno_device *adreno_dev)

{

	struct a6xx_gmu_device *gmu = to_a6xx_gmu(adreno_dev);

	struct resource *res_pdc, *res_cfg, *res_seq;
@@ -435,7 +435,7 @@ static void a6xx_gmu_power_config(struct adreno_device *adreno_dev) 
				RPMH_ENABLE_MASK);

}



static int a6xx_gmu_device_start(struct adreno_device *adreno_dev)

int a6xx_gmu_device_start(struct adreno_device *adreno_dev)

{

	struct kgsl_device *device = KGSL_DEVICE(adreno_dev);

	struct a6xx_gmu_device *gmu = to_a6xx_gmu(adreno_dev);
@@ -470,7 +470,7 @@ static int a6xx_gmu_device_start(struct adreno_device *adreno_dev) 
 * a6xx_gmu_hfi_start() - Write registers and start HFI.

 * @device: Pointer to KGSL device

 */

static int a6xx_gmu_hfi_start(struct adreno_device *adreno_dev)

int a6xx_gmu_hfi_start(struct adreno_device *adreno_dev)

{

	struct a6xx_gmu_device *gmu = to_a6xx_gmu(adreno_dev);

	struct kgsl_device *device = KGSL_DEVICE(adreno_dev);
@@ -490,7 +490,7 @@ static int a6xx_gmu_hfi_start(struct adreno_device *adreno_dev) 
	return 0;

}



static int a6xx_rscc_wakeup_sequence(struct adreno_device *adreno_dev)

int a6xx_rscc_wakeup_sequence(struct adreno_device *adreno_dev)

{

	struct kgsl_device *device = KGSL_DEVICE(adreno_dev);

	struct a6xx_gmu_device *gmu = to_a6xx_gmu(adreno_dev);
@@ -543,7 +543,7 @@ static int a6xx_rscc_wakeup_sequence(struct adreno_device *adreno_dev) 
	return -ETIMEDOUT;

}



static int a6xx_rscc_sleep_sequence(struct adreno_device *adreno_dev)

int a6xx_rscc_sleep_sequence(struct adreno_device *adreno_dev)

{

	struct kgsl_device *device = KGSL_DEVICE(adreno_dev);

	struct a6xx_gmu_device *gmu = to_a6xx_gmu(adreno_dev);
@@ -656,7 +656,7 @@ static void load_tcm(struct adreno_device *adreno_dev, const u8 *src, 
	memcpy_toio(addr, src, blk->size);

}



static int a6xx_gmu_load_fw(struct adreno_device *adreno_dev)

int a6xx_gmu_load_fw(struct adreno_device *adreno_dev)

{

	struct a6xx_gmu_device *gmu = to_a6xx_gmu(adreno_dev);

	const u8 *fw = (const u8 *)gmu->fw_image->data;
@@ -728,7 +728,7 @@ static const char *oob_to_str(enum oob_request req) 
	return "unknown";

}



static int a6xx_gmu_oob_set(struct kgsl_device *device,

int a6xx_gmu_oob_set(struct kgsl_device *device,

		enum oob_request req)

{

	struct adreno_device *adreno_dev = ADRENO_DEVICE(device);
@@ -770,7 +770,7 @@ static int a6xx_gmu_oob_set(struct kgsl_device *device, 
	return ret;

}



static void a6xx_gmu_oob_clear(struct kgsl_device *device,

void a6xx_gmu_oob_clear(struct kgsl_device *device,

		enum oob_request req)

{

	struct adreno_device *adreno_dev = ADRENO_DEVICE(device);
@@ -792,7 +792,7 @@ static void a6xx_gmu_oob_clear(struct kgsl_device *device, 
	trace_kgsl_gmu_oob_clear(clear);

}



static void a6xx_gmu_irq_enable(struct adreno_device *adreno_dev)

void a6xx_gmu_irq_enable(struct adreno_device *adreno_dev)

{

	struct kgsl_device *device = KGSL_DEVICE(adreno_dev);

	struct a6xx_gmu_device *gmu = to_a6xx_gmu(adreno_dev);
@@ -813,7 +813,7 @@ static void a6xx_gmu_irq_enable(struct adreno_device *adreno_dev) 
	enable_irq(gmu->irq);

}



static void a6xx_gmu_irq_disable(struct adreno_device *adreno_dev)

void a6xx_gmu_irq_disable(struct adreno_device *adreno_dev)

{

	struct kgsl_device *device = KGSL_DEVICE(adreno_dev);

	struct a6xx_gmu_device *gmu = to_a6xx_gmu(adreno_dev);
@@ -1116,7 +1116,7 @@ static const char *idle_level_name(int level) 
	return "";

}



static int a6xx_gmu_wait_for_lowest_idle(struct adreno_device *adreno_dev)

int a6xx_gmu_wait_for_lowest_idle(struct adreno_device *adreno_dev)

{

	struct kgsl_device *device = KGSL_DEVICE(adreno_dev);

	struct a6xx_gmu_device *gmu = to_a6xx_gmu(adreno_dev);
@@ -1193,7 +1193,7 @@ static int a6xx_gmu_wait_for_lowest_idle(struct adreno_device *adreno_dev) 


/* Bitmask for GPU idle status check */

#define CXGXCPUBUSYIGNAHB	BIT(30)

static int a6xx_gmu_wait_for_idle(struct adreno_device *adreno_dev)

int a6xx_gmu_wait_for_idle(struct adreno_device *adreno_dev)

{

	struct kgsl_device *device = KGSL_DEVICE(adreno_dev);

	struct a6xx_gmu_device *gmu = to_a6xx_gmu(adreno_dev);
@@ -1219,7 +1219,7 @@ static int a6xx_gmu_wait_for_idle(struct adreno_device *adreno_dev) 
/* A6xx GMU FENCE RANGE MASK */

#define GMU_FENCE_RANGE_MASK	((0x1 << 31) | ((0xA << 2) << 18) | (0x8A0))



static void a6xx_gmu_version_info(struct adreno_device *adreno_dev)

void a6xx_gmu_version_info(struct adreno_device *adreno_dev)

{

	struct kgsl_device *device = KGSL_DEVICE(adreno_dev);

	struct a6xx_gmu_device *gmu = to_a6xx_gmu(adreno_dev);
@@ -1237,7 +1237,7 @@ static void a6xx_gmu_version_info(struct adreno_device *adreno_dev) 
				&gmu->ver.hfi);

}



static int a6xx_gmu_itcm_shadow(struct adreno_device *adreno_dev)

int a6xx_gmu_itcm_shadow(struct adreno_device *adreno_dev)

{

	struct a6xx_gmu_device *gmu = to_a6xx_gmu(adreno_dev);

	u32 i, *dest;
@@ -1292,7 +1292,7 @@ static void a6xx_gmu_enable_lm(struct adreno_device *adreno_dev) 
	gmu_core_regwrite(device, A6XX_GMU_AO_SPARE_CNTL, 1);

}



static void a6xx_gmu_register_config(struct adreno_device *adreno_dev)

void a6xx_gmu_register_config(struct adreno_device *adreno_dev)

{

	const struct adreno_a6xx_core *a6xx_core = to_a6xx_core(adreno_dev);

	struct a6xx_gmu_device *gmu = to_a6xx_gmu(adreno_dev);
@@ -1484,7 +1484,7 @@ static int a6xx_gmu_process_prealloc(struct a6xx_gmu_device *gmu, 
	return 0;

}



static int a6xx_gmu_parse_fw(struct adreno_device *adreno_dev)

int a6xx_gmu_parse_fw(struct adreno_device *adreno_dev)

{

	struct a6xx_gmu_device *gmu = to_a6xx_gmu(adreno_dev);

	const struct adreno_a6xx_core *a6xx_core = to_a6xx_core(adreno_dev);
@@ -1536,7 +1536,7 @@ static int a6xx_gmu_parse_fw(struct adreno_device *adreno_dev) 
	return 0;

}



static int a6xx_gmu_memory_init(struct adreno_device *adreno_dev)

int a6xx_gmu_memory_init(struct adreno_device *adreno_dev)

{

	struct a6xx_gmu_device *gmu = to_a6xx_gmu(adreno_dev);
@@ -1688,7 +1688,7 @@ static void a6xx_gmu_pwrctrl_suspend(struct adreno_device *adreno_dev) 
 * a6xx_gmu_notify_slumber() - initiate request to GMU to prepare to slumber

 * @device: Pointer to KGSL device

 */

static int a6xx_gmu_notify_slumber(struct adreno_device *adreno_dev)

int a6xx_gmu_notify_slumber(struct adreno_device *adreno_dev)

{

	struct kgsl_device *device = KGSL_DEVICE(adreno_dev);

	struct kgsl_pwrctrl *pwr = &device->pwrctrl;
@@ -1741,7 +1741,7 @@ static int a6xx_gmu_notify_slumber(struct adreno_device *adreno_dev) 
	return ret;

}



static void a6xx_gmu_suspend(struct adreno_device *adreno_dev)

void a6xx_gmu_suspend(struct adreno_device *adreno_dev)

{

	struct a6xx_gmu_device *gmu = to_a6xx_gmu(adreno_dev);

	struct kgsl_device *device = KGSL_DEVICE(adreno_dev);
@@ -2059,7 +2059,7 @@ void a6xx_gmu_snapshot(struct adreno_device *adreno_dev, 


}



static void a6xx_gmu_aop_send_acd_state(struct a6xx_gmu_device *gmu, bool flag)

void a6xx_gmu_aop_send_acd_state(struct a6xx_gmu_device *gmu, bool flag)

{

	char msg_buf[33];

	int ret;
@@ -2082,7 +2082,7 @@ static void a6xx_gmu_aop_send_acd_state(struct a6xx_gmu_device *gmu, bool flag) 
			"AOP mbox send message failed: %d\n", ret);

}



static int a6xx_gmu_enable_gdsc(struct adreno_device *adreno_dev)

int a6xx_gmu_enable_gdsc(struct adreno_device *adreno_dev)

{

	struct a6xx_gmu_device *gmu = to_a6xx_gmu(adreno_dev);

	int ret;
@@ -2107,7 +2107,7 @@ static int a6xx_gmu_clk_set_rate(struct a6xx_gmu_device *gmu, const char *id, 
	return clk_set_rate(clk, rate);

}



static int a6xx_gmu_enable_clks(struct adreno_device *adreno_dev)

int a6xx_gmu_enable_clks(struct adreno_device *adreno_dev)

{

	struct a6xx_gmu_device *gmu = to_a6xx_gmu(adreno_dev);

	struct kgsl_device *device = KGSL_DEVICE(adreno_dev);
@@ -2518,7 +2518,7 @@ static int a6xx_gmu_regulators_probe(struct a6xx_gmu_device *gmu, 
	return 0;

}



static void a6xx_gmu_remove(struct kgsl_device *device)

void a6xx_gmu_remove(struct kgsl_device *device)

{

	struct adreno_device *adreno_dev = ADRENO_DEVICE(device);

	struct a6xx_gmu_device *gmu = to_a6xx_gmu(adreno_dev);
@@ -2633,7 +2633,7 @@ static int a6xx_gmu_iommu_init(struct a6xx_gmu_device *gmu, 
			node, a6xx_gmu_kernel_fault_handler);

}



static int a6xx_gmu_probe(struct kgsl_device *device,

int a6xx_gmu_probe(struct kgsl_device *device,

		struct platform_device *pdev)

{

	struct adreno_device *adreno_dev = ADRENO_DEVICE(device);
@@ -2757,7 +2757,7 @@ static void a6xx_gmu_active_count_put(struct adreno_device *adreno_dev) 
	wake_up(&device->active_cnt_wq);

}



static int halt_gbif(struct adreno_device *adreno_dev)

int a6xx_halt_gbif(struct adreno_device *adreno_dev)

{

	struct kgsl_device *device = KGSL_DEVICE(adreno_dev);

	int ret;
@@ -2806,7 +2806,7 @@ static int a6xx_gmu_power_off(struct adreno_device *adreno_dev) 


	/* Now that we are done with GMU and GPU, Clear the GBIF */

	if (!adreno_is_a630(adreno_dev))

		ret = halt_gbif(adreno_dev);

		ret = a6xx_halt_gbif(adreno_dev);



	a6xx_gmu_irq_disable(adreno_dev);