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Commit 9dc505d6 authored by Thomas Gleixner's avatar Thomas Gleixner
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Merge tag 'irqchip-4.15-3' of... 

Merge tag 'irqchip-4.15-3' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/core

Pull irqchip updates for 4.15, take #3 from Marc Zyngier:

 - New Socionext Synquacer EXIU driver
 - stm32 new platform support and fixes
 - One GICv4 bugfix
 - A couple of MIPS GIC cleanups
parents 722c908f 666740fd

Documentation/devicetree/bindings/interrupt-controller/socionext,synquacer-exiu.txt

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Socionext SynQuacer External Interrupt Unit (EXIU)



The Socionext Synquacer SoC has an external interrupt unit (EXIU)

that forwards a block of 32 configurable input lines to 32 adjacent

level-high type GICv3 SPIs.



Required properties:



- compatible           : Should be "socionext,synquacer-exiu".

- reg                  : Specifies base physical address and size of the

                         control registers.

- interrupt-controller : Identifies the node as an interrupt controller.

- #interrupt-cells     : Specifies the number of cells needed to encode an

                         interrupt source. The value must be 3.

- interrupt-parent     : phandle of the GIC these interrupts are routed to.

- socionext,spi-base   : The SPI number of the first SPI of the 32 adjacent

                         ones the EXIU forwards its interrups to.



Notes:



- Only SPIs can use the EXIU as an interrupt parent.



Example:



	exiu: interrupt-controller@510c0000 {

		compatible = "socionext,synquacer-exiu";

		reg = <0x0 0x510c0000 0x0 0x20>;

		interrupt-controller;

		interrupt-parent = <&gic>;

		#interrupt-cells = <3>;

		socionext,spi-base = <112>;

	};

Documentation/devicetree/bindings/interrupt-controller/st,stm32-exti.txt

+3 −1
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@@ -2,7 +2,9 @@ STM32 External Interrupt Controller 


Required properties:



- compatible: Should be "st,stm32-exti"

- compatible: Should be:

    "st,stm32-exti"

    "st,stm32h7-exti"

- reg: Specifies base physical address and size of the registers

- interrupt-controller: Indentifies the node as an interrupt controller

- #interrupt-cells: Specifies the number of cells to encode an interrupt

arch/arm64/Kconfig.platforms

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@@ -161,6 +161,9 @@ config ARCH_SEATTLE 
config ARCH_SHMOBILE

	bool



config ARCH_SYNQUACER

	bool "Socionext SynQuacer SoC Family"



config ARCH_RENESAS

	bool "Renesas SoC Platforms"

	select ARCH_SHMOBILE

drivers/irqchip/Kconfig

+1 −0
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@@ -306,6 +306,7 @@ config EZNPS_GIC 
config STM32_EXTI

	bool

	select IRQ_DOMAIN

	select GENERIC_IRQ_CHIP



config QCOM_IRQ_COMBINER

	bool "QCOM IRQ combiner support"

drivers/irqchip/Makefile

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@@ -79,4 +79,5 @@ obj-$(CONFIG_ARCH_ASPEED) += irq-aspeed-vic.o irq-aspeed-i2c-ic.o 
obj-$(CONFIG_STM32_EXTI) 		+= irq-stm32-exti.o

obj-$(CONFIG_QCOM_IRQ_COMBINER)		+= qcom-irq-combiner.o

obj-$(CONFIG_IRQ_UNIPHIER_AIDET)	+= irq-uniphier-aidet.o

obj-$(CONFIG_ARCH_SYNQUACER)		+= irq-sni-exiu.o

obj-$(CONFIG_MESON_IRQ_GPIO)		+= irq-meson-gpio.o