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Unverified Commit 9c6c417d authored by Pierre-Louis Bossart's avatar Pierre-Louis Bossart Committed by Mark Brown
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ASoC: SOF: fix HDA direct MMIO access



The recent change to remove the bus->io_ops callbacks used an older
version of the SOF code base, and when merged into Mark's for-next it
invalidated changes, resulting in broken compilation identified by
kbuild and reproduced during the weekly SOF rebase.

Restore SOF code overridden by git merge and apply Takashi's intended
change in the 'right' location.

Fixes: c2f16a94 ("Merge branch 'topic/hda-bus-ops-cleanup'")
Reported-by: default avatarkbuild test robot <lkp@intel.com>
Cc: Takashi Iwai <tiwai@suse.de>
Signed-off-by: default avatarPierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Link: https://lore.kernel.org/r/20190812190502.30729-1-pierre-louis.bossart@linux.intel.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 8da2d74c
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+1 −1
Original line number Diff line number Diff line
@@ -254,7 +254,7 @@ int hda_dsp_ctrl_init_chip(struct snd_sof_dev *sdev, bool full_reset)
#if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
	/* Reset stream-to-link mapping */
	list_for_each_entry(hlink, &bus->hlink_list, list)
		bus->io_ops->reg_writel(0, hlink->ml_addr + AZX_REG_ML_LOSIDV);
		writel(0, hlink->ml_addr + AZX_REG_ML_LOSIDV);
#endif

	bus->chip_init = true;
+0 −39
Original line number Diff line number Diff line
@@ -354,45 +354,6 @@ static int hda_resume(struct snd_sof_dev *sdev, bool runtime_resume)
		return ret;
	}

	hda_dsp_ctrl_misc_clock_gating(sdev, false);

	/* Reset stream-to-link mapping */
	list_for_each_entry(hlink, &bus->hlink_list, list)
		writel(0, hlink->ml_addr + AZX_REG_ML_LOSIDV);

	hda_dsp_ctrl_misc_clock_gating(sdev, true);
#else

	hda_dsp_ctrl_misc_clock_gating(sdev, false);

	/* reset controller */
	ret = hda_dsp_ctrl_link_reset(sdev, true);
	if (ret < 0) {
		dev_err(sdev->dev,
			"error: failed to reset controller during resume\n");
		return ret;
	}

	/* take controller out of reset */
	ret = hda_dsp_ctrl_link_reset(sdev, false);
	if (ret < 0) {
		dev_err(sdev->dev,
			"error: failed to ready controller during resume\n");
		return ret;
	}

	/* enable hda bus irq */
	snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL,
				SOF_HDA_INT_CTRL_EN | SOF_HDA_INT_GLOBAL_EN,
				SOF_HDA_INT_CTRL_EN | SOF_HDA_INT_GLOBAL_EN);

	hda_dsp_ctrl_misc_clock_gating(sdev, true);
#endif

	/* enable ppcap interrupt */
	hda_dsp_ctrl_ppcap_enable(sdev, true);
	hda_dsp_ctrl_ppcap_int_enable(sdev, true);

#if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
	/* check jack status */
	if (runtime_resume)