Merge "ARM: dts: msm: Mark PMIC QUPs as critical clock devices for BLAIR"

	};

};

/*

 * Each QUP device that's a parent to PMIC must be listed as a critical device

 * to GCC

 */

&gcc {

	qcom,critical-devices = <&qupv3_se10_i2c>;

};

&qupv3_se10_i2c {

	#address-cells = <1>;

	#size-cells = <0>;