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Commit 9a3ba7b2 authored by Kornel Dulęba's avatar Kornel Dulęba Committed by Greg Kroah-Hartman
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Revert "pinctrl: amd: Disable and mask interrupts on resume" 



commit 534e465845ebfb4a97eb5459d3931a0b35e3b9a5 upstream.

This reverts commit b26cd9325be4c1fcd331b77f10acb627c560d4d7.

This patch introduces a regression on Lenovo Z13, which can't wake
from the lid with it applied; and some unspecified AMD based Dell
platforms are unable to wake from hitting the power button

Signed-off-by: default avatarKornel Dulęba <korneld@chromium.org>
Reviewed-by: default avatarMario Limonciello <mario.limonciello@amd.com>
Link: https://lore.kernel.org/r/20230411134932.292287-1-korneld@chromium.org


Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 2945f948

drivers/pinctrl/pinctrl-amd.c

+16 −20
Original line number Diff line number Diff line
@@ -770,34 +770,32 @@ static const struct pinconf_ops amd_pinconf_ops = { 
	.pin_config_group_set = amd_pinconf_group_set,

};



static void amd_gpio_irq_init_pin(struct amd_gpio *gpio_dev, int pin)

static void amd_gpio_irq_init(struct amd_gpio *gpio_dev)

{

	const struct pin_desc *pd;

	struct pinctrl_desc *desc = gpio_dev->pctrl->desc;

	unsigned long flags;

	u32 pin_reg, mask;

	int i;



	mask = BIT(WAKE_CNTRL_OFF_S0I3) | BIT(WAKE_CNTRL_OFF_S3) |

		BIT(INTERRUPT_MASK_OFF) | BIT(INTERRUPT_ENABLE_OFF) |

		BIT(WAKE_CNTRL_OFF_S4);



	pd = pin_desc_get(gpio_dev->pctrl, pin);

	for (i = 0; i < desc->npins; i++) {

		int pin = desc->pins[i].number;

		const struct pin_desc *pd = pin_desc_get(gpio_dev->pctrl, pin);



		if (!pd)

		return;

			continue;



		raw_spin_lock_irqsave(&gpio_dev->lock, flags);

	pin_reg = readl(gpio_dev->base + pin * 4);



		pin_reg = readl(gpio_dev->base + i * 4);

		pin_reg &= ~mask;

	writel(pin_reg, gpio_dev->base + pin * 4);

		writel(pin_reg, gpio_dev->base + i * 4);



		raw_spin_unlock_irqrestore(&gpio_dev->lock, flags);

	}



static void amd_gpio_irq_init(struct amd_gpio *gpio_dev)

{

	struct pinctrl_desc *desc = gpio_dev->pctrl->desc;

	int i;



	for (i = 0; i < desc->npins; i++)

		amd_gpio_irq_init_pin(gpio_dev, i);

}



#ifdef CONFIG_PM_SLEEP
@@ -850,10 +848,8 @@ static int amd_gpio_resume(struct device *dev) 
	for (i = 0; i < desc->npins; i++) {

		int pin = desc->pins[i].number;



		if (!amd_gpio_should_save(gpio_dev, pin)) {

			amd_gpio_irq_init_pin(gpio_dev, pin);

		if (!amd_gpio_should_save(gpio_dev, pin))

			continue;

		}



		raw_spin_lock_irqsave(&gpio_dev->lock, flags);

		gpio_dev->saved_regs[i] |= readl(gpio_dev->base + pin * 4) & PIN_IRQ_PENDING;