Loading arch/arm/boot/dts/mmp2.dtsi +22 −0 Original line number Diff line number Diff line Loading @@ -170,6 +170,28 @@ interrupts = <54>; status = "disabled"; }; camera0: camera@d420a000 { compatible = "marvell,mmp2-ccic"; reg = <0xd420a000 0x800>; interrupts = <42>; clocks = <&soc_clocks MMP2_CLK_CCIC0>; clock-names = "axi"; #clock-cells = <0>; clock-output-names = "mclk"; status = "disabled"; }; camera1: camera@d420a800 { compatible = "marvell,mmp2-ccic"; reg = <0xd420a800 0x800>; interrupts = <30>; clocks = <&soc_clocks MMP2_CLK_CCIC1>; clock-names = "axi"; #clock-cells = <0>; clock-output-names = "mclk"; status = "disabled"; }; }; apb@d4000000 { /* APB */ Loading Loading
arch/arm/boot/dts/mmp2.dtsi +22 −0 Original line number Diff line number Diff line Loading @@ -170,6 +170,28 @@ interrupts = <54>; status = "disabled"; }; camera0: camera@d420a000 { compatible = "marvell,mmp2-ccic"; reg = <0xd420a000 0x800>; interrupts = <42>; clocks = <&soc_clocks MMP2_CLK_CCIC0>; clock-names = "axi"; #clock-cells = <0>; clock-output-names = "mclk"; status = "disabled"; }; camera1: camera@d420a800 { compatible = "marvell,mmp2-ccic"; reg = <0xd420a800 0x800>; interrupts = <30>; clocks = <&soc_clocks MMP2_CLK_CCIC1>; clock-names = "axi"; #clock-cells = <0>; clock-output-names = "mclk"; status = "disabled"; }; }; apb@d4000000 { /* APB */ Loading