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Commit 998c6103 authored by Kumar Gala's avatar Kumar Gala
Browse files

[POWERPC] fsl: Convert dts to v1 syntax

parent 280bb34b
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+37 −36
Original line number Diff line number Diff line
@@ -2,7 +2,7 @@
 * EP88xC Device Tree Source
 *
 * Copyright 2006 MontaVista Software, Inc.
 * Copyright 2007 Freescale Semiconductor, Inc.
 * Copyright 2007,2008 Freescale Semiconductor, Inc.
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
@@ -10,6 +10,7 @@
 * option) any later version.
 */

/dts-v1/;

/ {
	model = "EP88xC";
@@ -23,44 +24,44 @@

		PowerPC,885@0 {
			device_type = "cpu";
			reg = <0>;
			d-cache-line-size = <d#16>;
			i-cache-line-size = <d#16>;
			d-cache-size = <d#8192>;
			i-cache-size = <d#8192>;
			reg = <0x0>;
			d-cache-line-size = <16>;
			i-cache-line-size = <16>;
			d-cache-size = <8192>;
			i-cache-size = <8192>;
			timebase-frequency = <0>;
			bus-frequency = <0>;
			clock-frequency = <0>;
			interrupts = <f 2>;	// decrementer interrupt
			interrupts = <15 2>;	// decrementer interrupt
			interrupt-parent = <&PIC>;
		};
	};

	memory {
		device_type = "memory";
		reg = <0 0>;
		reg = <0x0 0x0>;
	};

	localbus@fa200100 {
		compatible = "fsl,mpc885-localbus", "fsl,pq1-localbus";
		#address-cells = <2>;
		#size-cells = <1>;
		reg = <fa200100 40>;
		reg = <0xfa200100 0x40>;

		ranges = <
			0 0 fc000000 04000000
			3 0 fa000000 01000000
			0x0 0x0 0xfc000000 0x4000000
			0x3 0x0 0xfa000000 0x1000000
		>;

		flash@0,2000000 {
			compatible = "cfi-flash";
			reg = <0 2000000 2000000>;
			reg = <0x0 0x2000000 0x2000000>;
			bank-width = <4>;
			device-width = <2>;
		};

		board-control@3,400000 {
			reg = <3 400000 10>;
			reg = <0x3 0x400000 0x10>;
			compatible = "fsl,ep88xc-bcsr";
		};
	};
@@ -70,25 +71,25 @@
		#address-cells = <1>;
		#size-cells = <1>;
		device_type = "soc";
		ranges = <0 fa200000 00004000>;
		ranges = <0x0 0xfa200000 0x4000>;
		bus-frequency = <0>;

		// Temporary -- will go away once kernel uses ranges for get_immrbase().
		reg = <fa200000 4000>;
		reg = <0xfa200000 0x4000>;

		mdio@e00 {
			compatible = "fsl,mpc885-fec-mdio", "fsl,pq1-fec-mdio";
			reg = <e00 188>;
			reg = <0xe00 0x188>;
			#address-cells = <1>;
			#size-cells = <0>;

			PHY0: ethernet-phy@0 {
				reg = <0>;
				reg = <0x0>;
				device_type = "ethernet-phy";
			};

			PHY1: ethernet-phy@1 {
				reg = <1>;
				reg = <0x1>;
				device_type = "ethernet-phy";
			};
		};
@@ -97,7 +98,7 @@
			device_type = "network";
			compatible = "fsl,mpc885-fec-enet",
			             "fsl,pq1-fec-enet";
			reg = <e00 188>;
			reg = <0xe00 0x188>;
			local-mac-address = [ 00 00 00 00 00 00 ];
			interrupts = <3 1>;
			interrupt-parent = <&PIC>;
@@ -109,7 +110,7 @@
			device_type = "network";
			compatible = "fsl,mpc885-fec-enet",
			             "fsl,pq1-fec-enet";
			reg = <1e00 188>;
			reg = <0x1e00 0x188>;
			local-mac-address = [ 00 00 00 00 00 00 ];
			interrupts = <7 1>;
			interrupt-parent = <&PIC>;
@@ -120,7 +121,7 @@
		PIC: interrupt-controller@0 {
			interrupt-controller;
			#interrupt-cells = <2>;
			reg = <0 24>;
			reg = <0x0 0x24>;
			compatible = "fsl,mpc885-pic", "fsl,pq1-pic";
		};

@@ -130,29 +131,29 @@
			#size-cells = <2>;
			compatible = "fsl,pq-pcmcia";
			device_type = "pcmcia";
			reg = <80 80>;
			reg = <0x80 0x80>;
			interrupt-parent = <&PIC>;
			interrupts = <d 1>;
			interrupts = <13 1>;
		};

		cpm@9c0 {
			#address-cells = <1>;
			#size-cells = <1>;
			compatible = "fsl,mpc885-cpm", "fsl,cpm1";
			command-proc = <9c0>;
			command-proc = <0x9c0>;
			interrupts = <0>;	// cpm error interrupt
			interrupt-parent = <&CPM_PIC>;
			reg = <9c0 40>;
			reg = <0x9c0 0x40>;
			ranges;

			muram@2000 {
				#address-cells = <1>;
				#size-cells = <1>;
				ranges = <0 2000 2000>;
				ranges = <0x0 0x2000 0x2000>;

				data@0 {
					compatible = "fsl,cpm-muram-data";
					reg = <0 1c00>;
					reg = <0x0 0x1c00>;
				};
			};

@@ -160,7 +161,7 @@
				compatible = "fsl,mpc885-brg",
				             "fsl,cpm1-brg",
				             "fsl,cpm-brg";
				reg = <9f0 10>;
				reg = <0x9f0 0x10>;
			};

			CPM_PIC: interrupt-controller@930 {
@@ -168,7 +169,7 @@
				#interrupt-cells = <1>;
				interrupts = <5 2 0 2>;
				interrupt-parent = <&PIC>;
				reg = <930 20>;
				reg = <0x930 0x20>;
				compatible = "fsl,mpc885-cpm-pic",
				             "fsl,cpm1-pic";
			};
@@ -178,11 +179,11 @@
				device_type = "serial";
				compatible = "fsl,mpc885-smc-uart",
				             "fsl,cpm1-smc-uart";
				reg = <a80 10 3e80 40>;
				reg = <0xa80 0x10 0x3e80 0x40>;
				interrupts = <4>;
				interrupt-parent = <&CPM_PIC>;
				fsl,cpm-brg = <1>;
				fsl,cpm-command = <0090>;
				fsl,cpm-command = <0x90>;
				linux,planetcore-label = "SMC1";
			};

@@ -191,11 +192,11 @@
				device_type = "serial";
				compatible = "fsl,mpc885-scc-uart",
				             "fsl,cpm1-scc-uart";
				reg = <a20 20 3d00 80>;
				interrupts = <1d>;
				reg = <0xa20 0x20 0x3d00 0x80>;
				interrupts = <29>;
				interrupt-parent = <&CPM_PIC>;
				fsl,cpm-brg = <2>;
				fsl,cpm-command = <0040>;
				fsl,cpm-command = <0x40>;
				linux,planetcore-label = "SCC2";
			};

@@ -204,9 +205,9 @@
				#size-cells = <0>;
				compatible = "fsl,mpc885-usb",
				             "fsl,cpm1-usb";
				reg = <a00 18 1c00 80>;
				reg = <0xa00 0x18 0x1c00 0x80>;
				interrupt-parent = <&CPM_PIC>;
				interrupts = <1e>;
				interrupts = <30>;
				fsl,cpm-command = <0000>;
			};
		};
+43 −40
Original line number Diff line number Diff line
@@ -7,6 +7,7 @@
 * Based on sandpoint.dts
 *
 * 2006 (c) G. Liakhovetski <g.liakhovetski@gmx.de>
 * Copyright 2008 Freescale Semiconductor, Inc.
 *
 * This file is licensed under
 * the terms of the GNU General Public License version 2.  This program
@@ -17,6 +18,8 @@ XXXX add flash parts, rtc, ??

 */

/dts-v1/;

/ {
	model = "KuroboxHD";
	compatible = "linkstation";
@@ -35,19 +38,19 @@ XXXX add flash parts, rtc, ??

		PowerPC,603e { /* Really 8241 */
			device_type = "cpu";
			reg = <0>;
			clock-frequency = <bebc200>;	/* Fixed by bootloader */
			timebase-frequency = <1743000>; /* Fixed by bootloader */
			reg = <0x0>;
			clock-frequency = <200000000>;	/* Fixed by bootloader */
			timebase-frequency = <24391680>; /* Fixed by bootloader */
			bus-frequency = <0>;		/* Fixed by bootloader */
			/* Following required by dtc but not used */
			i-cache-size = <4000>;
			d-cache-size = <4000>;
			i-cache-size = <0x4000>;
			d-cache-size = <0x4000>;
		};
	};

	memory {
		device_type = "memory";
		reg = <00000000 04000000>;
		reg = <0x0 0x4000000>;
	};

	soc10x { /* AFAICT need to make soc for 8245's uarts to be defined */
@@ -56,26 +59,26 @@ XXXX add flash parts, rtc, ??
		device_type = "soc";
		compatible = "mpc10x";
		store-gathering = <0>; /* 0 == off, !0 == on */
		reg = <80000000 00100000>;
		ranges = <80000000 80000000 70000000	/* pci mem space */
			  fc000000 fc000000 00100000	/* EUMB */
			  fe000000 fe000000 00c00000	/* pci i/o space */
			  fec00000 fec00000 00300000	/* pci cfg regs */
			  fef00000 fef00000 00100000>;	/* pci iack */
		reg = <0x80000000 0x100000>;
		ranges = <0x80000000 0x80000000 0x70000000	/* pci mem space */
			  0xfc000000 0xfc000000 0x100000	/* EUMB */
			  0xfe000000 0xfe000000 0xc00000	/* pci i/o space */
			  0xfec00000 0xfec00000 0x300000	/* pci cfg regs */
			  0xfef00000 0xfef00000 0x100000>;	/* pci iack */

		i2c@80003000 {
			#address-cells = <1>;
			#size-cells = <0>;
			cell-index = <0>;
			compatible = "fsl-i2c";
			reg = <80003000 1000>;
			reg = <0x80003000 0x1000>;
			interrupts = <5 2>;
			interrupt-parent = <&mpic>;

			rtc@32 {
				device_type = "rtc";
				compatible = "ricoh,rs5c372a";
				reg = <32>;
				reg = <0x32>;
			};
		};

@@ -83,9 +86,9 @@ XXXX add flash parts, rtc, ??
			cell-index = <0>;
			device_type = "serial";
			compatible = "ns16550";
			reg = <80004500 8>;
			clock-frequency = <5d08d88>;
			current-speed = <2580>;
			reg = <0x80004500 0x8>;
			clock-frequency = <97553800>;
			current-speed = <9600>;
			interrupts = <9 0>;
			interrupt-parent = <&mpic>;
		};
@@ -94,10 +97,10 @@ XXXX add flash parts, rtc, ??
			cell-index = <1>;
			device_type = "serial";
			compatible = "ns16550";
			reg = <80004600 8>;
			clock-frequency = <5d08d88>;
			current-speed = <e100>;
			interrupts = <a 0>;
			reg = <0x80004600 0x8>;
			clock-frequency = <97553800>;
			current-speed = <57600>;
			interrupts = <10 0>;
			interrupt-parent = <&mpic>;
		};

@@ -107,7 +110,7 @@ XXXX add flash parts, rtc, ??
			device_type = "open-pic";
			compatible = "chrp,open-pic";
			interrupt-controller;
			reg = <80040000 40000>;
			reg = <0x80040000 0x40000>;
		};

		pci0: pci@fec00000 {
@@ -116,29 +119,29 @@ XXXX add flash parts, rtc, ??
			#interrupt-cells = <1>;
			device_type = "pci";
			compatible = "mpc10x-pci";
			reg = <fec00000 400000>;
			ranges = <01000000 0        0 fe000000 0 00c00000
				  02000000 0 80000000 80000000 0 70000000>;
			bus-range = <0 ff>;
			clock-frequency = <7f28155>;
			reg = <0xfec00000 0x400000>;
			ranges = <0x1000000 0x0        0x0 0xfe000000 0x0 0xc00000
				  0x2000000 0x0 0x80000000 0x80000000 0x0 0x70000000>;
			bus-range = <0 255>;
			clock-frequency = <133333333>;
			interrupt-parent = <&mpic>;
			interrupt-map-mask = <f800 0 0 7>;
			interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
			interrupt-map = <
				/* IDSEL 11 - IRQ0 ETH */
				5800 0 0 1 &mpic 0 1
				5800 0 0 2 &mpic 1 1
				5800 0 0 3 &mpic 2 1
				5800 0 0 4 &mpic 3 1
				0x5800 0x0 0x0 0x1 &mpic 0x0 0x1
				0x5800 0x0 0x0 0x2 &mpic 0x1 0x1
				0x5800 0x0 0x0 0x3 &mpic 0x2 0x1
				0x5800 0x0 0x0 0x4 &mpic 0x3 0x1
				/* IDSEL 12 - IRQ1 IDE0 */
				6000 0 0 1 &mpic 1 1
				6000 0 0 2 &mpic 2 1
				6000 0 0 3 &mpic 3 1
				6000 0 0 4 &mpic 0 1
				0x6000 0x0 0x0 0x1 &mpic 0x1 0x1
				0x6000 0x0 0x0 0x2 &mpic 0x2 0x1
				0x6000 0x0 0x0 0x3 &mpic 0x3 0x1
				0x6000 0x0 0x0 0x4 &mpic 0x0 0x1
				/* IDSEL 14 - IRQ3 USB2.0 */
				7000 0 0 1 &mpic 3 1
				7000 0 0 2 &mpic 3 1
				7000 0 0 3 &mpic 3 1
				7000 0 0 4 &mpic 3 1
				0x7000 0x0 0x0 0x1 &mpic 0x3 0x1
				0x7000 0x0 0x0 0x2 &mpic 0x3 0x1
				0x7000 0x0 0x0 0x3 &mpic 0x3 0x1
				0x7000 0x0 0x0 0x4 &mpic 0x3 0x1
			>;
		};
	};
+43 −40
Original line number Diff line number Diff line
@@ -7,6 +7,7 @@
 * Based on sandpoint.dts
 *
 * 2006 (c) G. Liakhovetski <g.liakhovetski@gmx.de>
 * Copyright 2008 Freescale Semiconductor, Inc.
 *
 * This file is licensed under
 * the terms of the GNU General Public License version 2.  This program
@@ -17,6 +18,8 @@ XXXX add flash parts, rtc, ??

 */

/dts-v1/;

/ {
	model = "KuroboxHG";
	compatible = "linkstation";
@@ -35,19 +38,19 @@ XXXX add flash parts, rtc, ??

		PowerPC,603e { /* Really 8241 */
			device_type = "cpu";
			reg = <0>;
			clock-frequency = <fdad680>;	/* Fixed by bootloader */
			timebase-frequency = <1F04000>; /* Fixed by bootloader */
			reg = <0x0>;
			clock-frequency = <266000000>;	/* Fixed by bootloader */
			timebase-frequency = <32522240>; /* Fixed by bootloader */
			bus-frequency = <0>;		/* Fixed by bootloader */
			/* Following required by dtc but not used */
			i-cache-size = <4000>;
			d-cache-size = <4000>;
			i-cache-size = <0x4000>;
			d-cache-size = <0x4000>;
		};
	};

	memory {
		device_type = "memory";
		reg = <00000000 08000000>;
		reg = <0x0 0x8000000>;
	};

	soc10x { /* AFAICT need to make soc for 8245's uarts to be defined */
@@ -56,26 +59,26 @@ XXXX add flash parts, rtc, ??
		device_type = "soc";
		compatible = "mpc10x";
		store-gathering = <0>; /* 0 == off, !0 == on */
		reg = <80000000 00100000>;
		ranges = <80000000 80000000 70000000	/* pci mem space */
			  fc000000 fc000000 00100000	/* EUMB */
			  fe000000 fe000000 00c00000	/* pci i/o space */
			  fec00000 fec00000 00300000	/* pci cfg regs */
			  fef00000 fef00000 00100000>;	/* pci iack */
		reg = <0x80000000 0x100000>;
		ranges = <0x80000000 0x80000000 0x70000000	/* pci mem space */
			  0xfc000000 0xfc000000 0x100000	/* EUMB */
			  0xfe000000 0xfe000000 0xc00000	/* pci i/o space */
			  0xfec00000 0xfec00000 0x300000	/* pci cfg regs */
			  0xfef00000 0xfef00000 0x100000>;	/* pci iack */

		i2c@80003000 {
			#address-cells = <1>;
			#size-cells = <0>;
			cell-index = <0>;
			compatible = "fsl-i2c";
			reg = <80003000 1000>;
			reg = <0x80003000 0x1000>;
			interrupts = <5 2>;
			interrupt-parent = <&mpic>;

			rtc@32 {
				device_type = "rtc";
				compatible = "ricoh,rs5c372a";
				reg = <32>;
				reg = <0x32>;
			};
		};

@@ -83,9 +86,9 @@ XXXX add flash parts, rtc, ??
			cell-index = <0>;
			device_type = "serial";
			compatible = "ns16550";
			reg = <80004500 8>;
			clock-frequency = <7c044a8>;
			current-speed = <2580>;
			reg = <0x80004500 0x8>;
			clock-frequency = <130041000>;
			current-speed = <9600>;
			interrupts = <9 0>;
			interrupt-parent = <&mpic>;
		};
@@ -94,10 +97,10 @@ XXXX add flash parts, rtc, ??
			cell-index = <1>;
			device_type = "serial";
			compatible = "ns16550";
			reg = <80004600 8>;
			clock-frequency = <7c044a8>;
			current-speed = <e100>;
			interrupts = <a 0>;
			reg = <0x80004600 0x8>;
			clock-frequency = <130041000>;
			current-speed = <57600>;
			interrupts = <10 0>;
			interrupt-parent = <&mpic>;
		};

@@ -107,7 +110,7 @@ XXXX add flash parts, rtc, ??
			device_type = "open-pic";
			compatible = "chrp,open-pic";
			interrupt-controller;
			reg = <80040000 40000>;
			reg = <0x80040000 0x40000>;
		};

		pci0: pci@fec00000 {
@@ -116,29 +119,29 @@ XXXX add flash parts, rtc, ??
			#interrupt-cells = <1>;
			device_type = "pci";
			compatible = "mpc10x-pci";
			reg = <fec00000 400000>;
			ranges = <01000000 0        0 fe000000 0 00c00000
				  02000000 0 80000000 80000000 0 70000000>;
			bus-range = <0 ff>;
			clock-frequency = <7f28155>;
			reg = <0xfec00000 0x400000>;
			ranges = <0x1000000 0x0        0x0 0xfe000000 0x0 0xc00000
				  0x2000000 0x0 0x80000000 0x80000000 0x0 0x70000000>;
			bus-range = <0 255>;
			clock-frequency = <133333333>;
			interrupt-parent = <&mpic>;
			interrupt-map-mask = <f800 0 0 7>;
			interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
			interrupt-map = <
				/* IDSEL 11 - IRQ0 ETH */
				5800 0 0 1 &mpic 0 1
				5800 0 0 2 &mpic 1 1
				5800 0 0 3 &mpic 2 1
				5800 0 0 4 &mpic 3 1
				0x5800 0x0 0x0 0x1 &mpic 0x0 0x1
				0x5800 0x0 0x0 0x2 &mpic 0x1 0x1
				0x5800 0x0 0x0 0x3 &mpic 0x2 0x1
				0x5800 0x0 0x0 0x4 &mpic 0x3 0x1
				/* IDSEL 12 - IRQ1 IDE0 */
				6000 0 0 1 &mpic 1 1
				6000 0 0 2 &mpic 2 1
				6000 0 0 3 &mpic 3 1
				6000 0 0 4 &mpic 0 1
				0x6000 0x0 0x0 0x1 &mpic 0x1 0x1
				0x6000 0x0 0x0 0x2 &mpic 0x2 0x1
				0x6000 0x0 0x0 0x3 &mpic 0x3 0x1
				0x6000 0x0 0x0 0x4 &mpic 0x0 0x1
				/* IDSEL 14 - IRQ3 USB2.0 */
				7000 0 0 1 &mpic 3 1
				7000 0 0 2 &mpic 3 1
				7000 0 0 3 &mpic 3 1
				7000 0 0 4 &mpic 3 1
				0x7000 0x0 0x0 0x1 &mpic 0x3 0x1
				0x7000 0x0 0x0 0x2 &mpic 0x3 0x1
				0x7000 0x0 0x0 0x3 &mpic 0x3 0x1
				0x7000 0x0 0x0 0x4 &mpic 0x3 0x1
			>;
		};
	};
+49 −48
Original line number Diff line number Diff line
/*
 * MPC7448HPC2 (Taiga) board Device Tree Source
 *
 * Copyright 2006 Freescale Semiconductor Inc.
 * Copyright 2006, 2008 Freescale Semiconductor Inc.
 * 2006 Roy Zang <Roy Zang at freescale.com>.
 *
 * This program is free software; you can redistribute  it and/or modify it
@@ -10,6 +10,7 @@
 * option) any later version.
 */

/dts-v1/;

/ {
	model = "mpc7448hpc2";
@@ -23,11 +24,11 @@
				
		PowerPC,7448@0 {
			device_type = "cpu";
			reg = <0>;
			d-cache-line-size = <20>;	// 32 bytes
			i-cache-line-size = <20>;	// 32 bytes
			d-cache-size = <8000>;		// L1, 32K bytes
			i-cache-size = <8000>;		// L1, 32K bytes
			reg = <0x0>;
			d-cache-line-size = <32>;	// 32 bytes
			i-cache-line-size = <32>;	// 32 bytes
			d-cache-size = <0x8000>;		// L1, 32K bytes
			i-cache-size = <0x8000>;		// L1, 32K bytes
			timebase-frequency = <0>;	// 33 MHz, from uboot
			clock-frequency = <0>;		// From U-Boot
			bus-frequency = <0>;		// From U-Boot
@@ -36,7 +37,7 @@

	memory {
		device_type = "memory";
		reg = <00000000 20000000	// DDR2   512M at 0
		reg = <0x0 0x20000000	// DDR2   512M at 0
		       >;
	};

@@ -44,14 +45,14 @@
		#address-cells = <1>;
		#size-cells = <1>;
		device_type = "tsi-bridge";
		ranges = <00000000 c0000000 00010000>;
		reg = <c0000000 00010000>;
		ranges = <0x0 0xc0000000 0x10000>;
		reg = <0xc0000000 0x10000>;
		bus-frequency = <0>;

		i2c@7000 {
			interrupt-parent = <&mpic>;
			interrupts = <E 0>;
			reg = <7000 400>;
			interrupts = <14 0>;
			reg = <0x7000 0x400>;
			device_type = "i2c";
			compatible  = "tsi108-i2c";
		};
@@ -59,20 +60,20 @@
		MDIO: mdio@6000 {
			device_type = "mdio";
			compatible = "tsi108-mdio";
			reg = <6000 50>;
			reg = <0x6000 0x50>;
			#address-cells = <1>;
			#size-cells = <0>;

			phy8: ethernet-phy@8 {
				interrupt-parent = <&mpic>;
				interrupts = <2 1>;
				reg = <8>;
				reg = <0x8>;
			};

			phy9: ethernet-phy@9 {
				interrupt-parent = <&mpic>;
				interrupts = <2 1>;
				reg = <9>;
				reg = <0x9>;
			};

		};
@@ -82,9 +83,9 @@
			#size-cells = <0>;
			device_type = "network";
			compatible = "tsi108-ethernet";
			reg = <6000 200>;
			reg = <0x6000 0x200>;
			address = [ 00 06 D2 00 00 01 ];
			interrupts = <10 2>;
			interrupts = <16 2>;
			interrupt-parent = <&mpic>;
			mdio-handle = <&MDIO>;
			phy-handle = <&phy8>;
@@ -96,9 +97,9 @@
			#size-cells = <0>;
			device_type = "network";
			compatible = "tsi108-ethernet";
			reg = <6400 200>;
			reg = <0x6400 0x200>;
			address = [ 00 06 D2 00 00 02 ];
			interrupts = <11 2>;
			interrupts = <17 2>;
			interrupt-parent = <&mpic>;
			mdio-handle = <&MDIO>;
			phy-handle = <&phy9>;
@@ -107,18 +108,18 @@
		serial@7808 {
			device_type = "serial";
			compatible = "ns16550";
			reg = <7808 200>;
			clock-frequency = <3f6b5a00>;
			interrupts = <c 0>;
			reg = <0x7808 0x200>;
			clock-frequency = <1064000000>;
			interrupts = <12 0>;
			interrupt-parent = <&mpic>;
		};

		serial@7c08 {
			device_type = "serial";
			compatible = "ns16550";
			reg = <7c08 200>;
			clock-frequency = <3f6b5a00>;
			interrupts = <d 0>;
			reg = <0x7c08 0x200>;
			clock-frequency = <1064000000>;
			interrupts = <13 0>;
			interrupt-parent = <&mpic>;
		};

@@ -127,7 +128,7 @@
			interrupt-controller;
			#address-cells = <0>;
			#interrupt-cells = <2>;
			reg = <7400 400>;
			reg = <0x7400 0x400>;
			compatible = "chrp,open-pic";
			device_type = "open-pic";
                       	big-endian;
@@ -138,39 +139,39 @@
			#interrupt-cells = <1>;
			#size-cells = <2>;
			#address-cells = <3>;
			reg = <1000 1000>;
			reg = <0x1000 0x1000>;
			bus-range = <0 0>;
			ranges = <02000000 0 e0000000 e0000000 0 1A000000	
				  01000000 0 00000000 fa000000 0 00010000>;
			clock-frequency = <7f28154>;
			ranges = <0x2000000 0x0 0xe0000000 0xe0000000 0x0 0x1a000000	
				  0x1000000 0x0 0x0 0xfa000000 0x0 0x10000>;
			clock-frequency = <133333332>;
			interrupt-parent = <&mpic>;
			interrupts = <17 2>;
			interrupt-map-mask = <f800 0 0 7>;
			interrupts = <23 2>;
			interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
			interrupt-map = <

				/* IDSEL 0x11 */
				0800 0 0 1 &RT0 24 0
				0800 0 0 2 &RT0 25 0
				0800 0 0 3 &RT0 26 0
				0800 0 0 4 &RT0 27 0
				0x800 0x0 0x0 0x1 &RT0 0x24 0x0
				0x800 0x0 0x0 0x2 &RT0 0x25 0x0
				0x800 0x0 0x0 0x3 &RT0 0x26 0x0
				0x800 0x0 0x0 0x4 &RT0 0x27 0x0

				/* IDSEL 0x12 */
				1000 0 0 1 &RT0 25 0
				1000 0 0 2 &RT0 26 0
				1000 0 0 3 &RT0 27 0
				1000 0 0 4 &RT0 24 0
				0x1000 0x0 0x0 0x1 &RT0 0x25 0x0
				0x1000 0x0 0x0 0x2 &RT0 0x26 0x0
				0x1000 0x0 0x0 0x3 &RT0 0x27 0x0
				0x1000 0x0 0x0 0x4 &RT0 0x24 0x0

				/* IDSEL 0x13 */
				1800 0 0 1 &RT0 26 0
				1800 0 0 2 &RT0 27 0
				1800 0 0 3 &RT0 24 0
				1800 0 0 4 &RT0 25 0
				0x1800 0x0 0x0 0x1 &RT0 0x26 0x0
				0x1800 0x0 0x0 0x2 &RT0 0x27 0x0
				0x1800 0x0 0x0 0x3 &RT0 0x24 0x0
				0x1800 0x0 0x0 0x4 &RT0 0x25 0x0

				/* IDSEL 0x14 */
				2000 0 0 1 &RT0 27 0
				2000 0 0 2 &RT0 24 0
				2000 0 0 3 &RT0 25 0
				2000 0 0 4 &RT0 26 0
				0x2000 0x0 0x0 0x1 &RT0 0x27 0x0
				0x2000 0x0 0x0 0x2 &RT0 0x24 0x0
				0x2000 0x0 0x0 0x3 &RT0 0x25 0x0
				0x2000 0x0 0x0 0x4 &RT0 0x26 0x0
				>;

			RT0: router@1180 {
@@ -180,7 +181,7 @@
				#address-cells = <0>;
				#interrupt-cells = <2>;
				big-endian;
				interrupts = <17 2>;
				interrupts = <23 2>;
				interrupt-parent = <&mpic>;
			};
		};
+67 −65

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