Loading qcom/yupik-gpu.dtsi +2 −2 Original line number Diff line number Diff line Loading @@ -80,8 +80,8 @@ <0>, /* Off */ <100>; /* On */ nvmem-cells = <&gpu_speed_bin>; nvmem-cell-names = "speed_bin"; nvmem-cells = <&gpu_speed_bin>, <&gpu_gaming_bin>; nvmem-cell-names = "speed_bin", "gaming_bin"; qcom,gpu-mempools { #address-cells = <1>; Loading qcom/yupik.dtsi +5 −0 Original line number Diff line number Diff line Loading @@ -3447,6 +3447,11 @@ bits = <5 8>; }; gpu_gaming_bin: gpu_gaming_bin@1f5 { reg = <0x1f5 0x1>; bits = <5 1>; }; feat_conf_m7: feat_conf_m7@6020 { reg = <0x6020 0x4>; }; Loading Loading
qcom/yupik-gpu.dtsi +2 −2 Original line number Diff line number Diff line Loading @@ -80,8 +80,8 @@ <0>, /* Off */ <100>; /* On */ nvmem-cells = <&gpu_speed_bin>; nvmem-cell-names = "speed_bin"; nvmem-cells = <&gpu_speed_bin>, <&gpu_gaming_bin>; nvmem-cell-names = "speed_bin", "gaming_bin"; qcom,gpu-mempools { #address-cells = <1>; Loading
qcom/yupik.dtsi +5 −0 Original line number Diff line number Diff line Loading @@ -3447,6 +3447,11 @@ bits = <5 8>; }; gpu_gaming_bin: gpu_gaming_bin@1f5 { reg = <0x1f5 0x1>; bits = <5 1>; }; feat_conf_m7: feat_conf_m7@6020 { reg = <0x6020 0x4>; }; Loading