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Commit 997941d7 authored by Felix Fietkau's avatar Felix Fietkau Committed by John W. Linville
Browse files

ath9k_hw: fix REG_SET_BIT and REG_CLR_BIT for multiple bits 



Signed-off-by: default avatarFelix Fietkau <nbd@openwrt.org>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent cf28d793

drivers/net/wireless/ath/ath9k/hw.h

+2 −2
Original line number Diff line number Diff line
@@ -95,9 +95,9 @@ 
#define REG_READ_FIELD(_a, _r, _f) \

	(((REG_READ(_a, _r) & _f) >> _f##_S))

#define REG_SET_BIT(_a, _r, _f) \

	REG_WRITE(_a, _r, REG_READ(_a, _r) | _f)

	REG_WRITE(_a, _r, REG_READ(_a, _r) | (_f))

#define REG_CLR_BIT(_a, _r, _f) \

	REG_WRITE(_a, _r, REG_READ(_a, _r) & ~_f)

	REG_WRITE(_a, _r, REG_READ(_a, _r) & ~(_f))



#define DO_DELAY(x) do {			\

		if ((++(x) % 64) == 0)          \