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Commit 9958e025 authored by Alexander Shishkin's avatar Alexander Shishkin Committed by Greg Kroah-Hartman
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intel_th: gth: Factor out trace start/stop 



The trace enable/disable functions of the GTH include the code that starts
and stops trace flom from the sources. This start/stop functionality will
also be used in the window switch trigger sequence.

Factor out start/stop code from the larger trace enable/disable code in
preparation for the window switch sequence.

Signed-off-by: default avatarAlexander Shishkin <alexander.shishkin@linux.intel.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 8d415512

drivers/hwtracing/intel_th/gth.c

+64 −29
Original line number Diff line number Diff line
@@ -457,37 +457,28 @@ static int intel_th_output_attributes(struct gth_device *gth) 
}



/**

 * intel_th_gth_disable() - disable tracing to an output device

 * @thdev:	GTH device

 * intel_th_gth_stop() - stop tracing to an output device

 * @gth:		GTH device

 * @output:		output device's descriptor

 * @capture_done:	set when no more traces will be captured

 *

 * This will deconfigure all masters set to output to this device,

 * disable tracing using force storeEn off signal and wait for the

 * "pipeline empty" bit for corresponding output port.

 * This will stop tracing using force storeEn off signal and wait for the

 * pipelines to be empty for the corresponding output port.

 */

static void intel_th_gth_disable(struct intel_th_device *thdev,

				 struct intel_th_output *output)

static void intel_th_gth_stop(struct gth_device *gth,

			      struct intel_th_output *output,

			      bool capture_done)

{

	struct gth_device *gth = dev_get_drvdata(&thdev->dev);

	struct intel_th_device *outdev =

		container_of(output, struct intel_th_device, output);

	struct intel_th_driver *outdrv =

		to_intel_th_driver(outdev->dev.driver);

	unsigned long count;

	int master;

	u32 reg;



	spin_lock(&gth->gth_lock);

	output->active = false;



	for_each_set_bit(master, gth->output[output->port].master,

			 TH_CONFIGURABLE_MASTERS) {

		gth_master_set(gth, master, -1);

	}

	spin_unlock(&gth->gth_lock);

	u32 scr2 = 0xfc | (capture_done ? 1 : 0);



	iowrite32(0, gth->base + REG_GTH_SCR);

	iowrite32(0xfd, gth->base + REG_GTH_SCR2);

	iowrite32(scr2, gth->base + REG_GTH_SCR2);



	/* wait on pipeline empty for the given port */

	for (reg = 0, count = GTH_PLE_WAITLOOP_DEPTH;
@@ -496,15 +487,63 @@ static void intel_th_gth_disable(struct intel_th_device *thdev, 
		cpu_relax();

	}



	if (!count)

		dev_dbg(gth->dev, "timeout waiting for GTH[%d] PLE\n",

			output->port);



	/* wait on output piepline empty */

	if (outdrv->wait_empty)

		outdrv->wait_empty(outdev);



	/* clear force capture done for next captures */

	iowrite32(0xfc, gth->base + REG_GTH_SCR2);

}



	if (!count)

		dev_dbg(&thdev->dev, "timeout waiting for GTH[%d] PLE\n",

			output->port);

/**

 * intel_th_gth_start() - start tracing to an output device

 * @gth:	GTH device

 * @output:	output device's descriptor

 *

 * This will start tracing using force storeEn signal.

 */

static void intel_th_gth_start(struct gth_device *gth,

			       struct intel_th_output *output)

{

	u32 scr = 0xfc0000;



	if (output->multiblock)

		scr |= 0xff;



	iowrite32(scr, gth->base + REG_GTH_SCR);

	iowrite32(0, gth->base + REG_GTH_SCR2);

}



/**

 * intel_th_gth_disable() - disable tracing to an output device

 * @thdev:	GTH device

 * @output:	output device's descriptor

 *

 * This will deconfigure all masters set to output to this device,

 * disable tracing using force storeEn off signal and wait for the

 * "pipeline empty" bit for corresponding output port.

 */

static void intel_th_gth_disable(struct intel_th_device *thdev,

				 struct intel_th_output *output)

{

	struct gth_device *gth = dev_get_drvdata(&thdev->dev);

	int master;

	u32 reg;



	spin_lock(&gth->gth_lock);

	output->active = false;



	for_each_set_bit(master, gth->output[output->port].master,

			 TH_CONFIGURABLE_MASTERS) {

		gth_master_set(gth, master, -1);

	}

	spin_unlock(&gth->gth_lock);



	intel_th_gth_stop(gth, output, true);



	reg = ioread32(gth->base + REG_GTH_SCRPD0);

	reg &= ~output->scratchpad;
@@ -533,8 +572,8 @@ static void intel_th_gth_enable(struct intel_th_device *thdev, 
{

	struct gth_device *gth = dev_get_drvdata(&thdev->dev);

	struct intel_th *th = to_intel_th(thdev);

	u32 scr = 0xfc0000, scrpd;

	int master;

	u32 scrpd;



	spin_lock(&gth->gth_lock);

	for_each_set_bit(master, gth->output[output->port].master,
@@ -542,9 +581,6 @@ static void intel_th_gth_enable(struct intel_th_device *thdev, 
		gth_master_set(gth, master, output->port);

	}



	if (output->multiblock)

		scr |= 0xff;



	output->active = true;

	spin_unlock(&gth->gth_lock);
@@ -555,8 +591,7 @@ static void intel_th_gth_enable(struct intel_th_device *thdev, 
	scrpd |= output->scratchpad;

	iowrite32(scrpd, gth->base + REG_GTH_SCRPD0);



	iowrite32(scr, gth->base + REG_GTH_SCR);

	iowrite32(0, gth->base + REG_GTH_SCR2);

	intel_th_gth_start(gth, output);

}



/**