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Commit 9816b226 authored by Jeykumar Sankaran's avatar Jeykumar Sankaran Committed by Rob Clark
Browse files

drm/msm/dpu: remove cdm block support from resource manager 



Support for CDM block is not present in DPU. Remove CDM
handlers from resource manager.

changes in v4:
	- Introduced in the series
changes in v5:
	- Remove catalog references to CDM (Sean)

Signed-off-by: default avatarJeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: default avatarSean Paul <seanpaul@chromium.org>
Signed-off-by: default avatarRob Clark <robdclark@gmail.com>
parent b033def8

drivers/gpu/drm/msm/Makefile

+0 −1
Original line number Diff line number Diff line
@@ -58,7 +58,6 @@ msm-y := \ 
	disp/dpu1/dpu_formats.o \

	disp/dpu1/dpu_hw_blk.o \

	disp/dpu1/dpu_hw_catalog.o \

	disp/dpu1/dpu_hw_cdm.o \

	disp/dpu1/dpu_hw_ctl.o \

	disp/dpu1/dpu_hw_interrupts.o \

	disp/dpu1/dpu_hw_intf.o \

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h

+0 −2
Original line number Diff line number Diff line
@@ -32,14 +32,12 @@ 
/**

 * Encoder functions and data types

 * @intfs:	Interfaces this encoder is using, INTF_MODE_NONE if unused

 * @needs_cdm:	Encoder requests a CDM based on pixel format conversion needs

 * @display_num_of_h_tiles: Number of horizontal tiles in case of split

 *                          interface

 * @topology:   Topology of the display

 */

struct dpu_encoder_hw_resources {

	enum dpu_intf_mode intfs[INTF_MAX];

	bool needs_cdm;

	u32 display_num_of_h_tiles;

};

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h

+0 −5
Original line number Diff line number Diff line
@@ -22,7 +22,6 @@ 
#include "dpu_hw_pingpong.h"

#include "dpu_hw_ctl.h"

#include "dpu_hw_top.h"

#include "dpu_hw_cdm.h"

#include "dpu_encoder.h"



#define DPU_ENCODER_NAME_MAX	16
@@ -204,8 +203,6 @@ struct dpu_encoder_irq { 
 * @parent_ops:		Callbacks exposed by the parent to the phys_enc

 * @hw_mdptop:		Hardware interface to the top registers

 * @hw_ctl:		Hardware interface to the ctl registers

 * @hw_cdm:		Hardware interface to the cdm registers

 * @cdm_cfg:		Chroma-down hardware configuration

 * @hw_pp:		Hardware interface to the ping pong registers

 * @dpu_kms:		Pointer to the dpu_kms top level

 * @cached_mode:	DRM mode cached at mode_set time, acted on in enable
@@ -235,8 +232,6 @@ struct dpu_encoder_phys { 
	const struct dpu_encoder_virt_ops *parent_ops;

	struct dpu_hw_mdp *hw_mdptop;

	struct dpu_hw_ctl *hw_ctl;

	struct dpu_hw_cdm *hw_cdm;

	struct dpu_hw_cdm_cfg cdm_cfg;

	struct dpu_hw_pingpong *hw_pp;

	struct dpu_kms *dpu_kms;

	struct drm_display_mode cached_mode;

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c

+0 −14
Original line number Diff line number Diff line
@@ -294,18 +294,6 @@ static struct dpu_intf_cfg sdm845_intf[] = { 
	INTF_BLK("intf_3", INTF_3, 0x6B800, INTF_DP, 1),

};



/*************************************************************

 * CDM sub blocks config

 *************************************************************/

static struct dpu_cdm_cfg sdm845_cdm[] = {

	{

	.name = "cdm_0", .id = CDM_0,

	.base = 0x79200, .len = 0x224,

	.features = 0,

	.intf_connect = BIT(INTF_3),

	},

};



/*************************************************************

 * VBIF sub blocks config

 *************************************************************/
@@ -430,8 +418,6 @@ static void sdm845_cfg_init(struct dpu_mdss_cfg *dpu_cfg) 
		.mixer = sdm845_lm,

		.pingpong_count = ARRAY_SIZE(sdm845_pp),

		.pingpong = sdm845_pp,

		.cdm_count = ARRAY_SIZE(sdm845_cdm),

		.cdm = sdm845_cdm,

		.intf_count = ARRAY_SIZE(sdm845_intf),

		.intf = sdm845_intf,

		.vbif_count = ARRAY_SIZE(sdm845_vbif),

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h

+0 −16
Original line number Diff line number Diff line
@@ -493,18 +493,6 @@ struct dpu_pingpong_cfg { 
	const struct dpu_pingpong_sub_blks *sblk;

};



/**

 * struct dpu_cdm_cfg - information of chroma down blocks

 * @id                 enum identifying this block

 * @base               register offset of this block

 * @features           bit mask identifying sub-blocks/features

 * @intf_connect       Bitmask of INTF IDs this CDM can connect to

 */

struct dpu_cdm_cfg   {

	DPU_HW_BLK_INFO;

	unsigned long intf_connect;

};



/**

 * struct dpu_intf_cfg - information of timing engine blocks

 * @id                 enum identifying this block
@@ -695,9 +683,6 @@ struct dpu_mdss_cfg { 
	u32 pingpong_count;

	struct dpu_pingpong_cfg *pingpong;



	u32 cdm_count;

	struct dpu_cdm_cfg *cdm;



	u32 intf_count;

	struct dpu_intf_cfg *intf;
@@ -733,7 +718,6 @@ struct dpu_mdss_hw_cfg_handler { 
#define BLK_CURSOR(s) ((s)->cursor)

#define BLK_MIXER(s) ((s)->mixer)

#define BLK_PINGPONG(s) ((s)->pingpong)

#define BLK_CDM(s) ((s)->cdm)

#define BLK_INTF(s) ((s)->intf)

#define BLK_AD(s) ((s)->ad)