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Commit 97e36b3c authored by Chen-Yu Tsai's avatar Chen-Yu Tsai Committed by Emilio López
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clk: sunxi: get divs parent clock name from parent factor clock 



Divs clocks consist of a parent factor clock with multiple outputs,
and seperate clocks for each output. Get the name of the parent
clock from the parent factor clock, instead of the DT node name.

Signed-off-by: default avatarChen-Yu Tsai <wens@csie.org>
Acked-by: default avatarMaxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: default avatarMike Turquette <mturquette@linaro.org>
Signed-off-by: default avatarEmilio López <emilio@elopez.com.ar>
parent 667f542d

drivers/clk/sunxi/clk-sunxi.c

+2 −1
Original line number Diff line number Diff line
@@ -869,7 +869,7 @@ static void __init sunxi_divs_clk_setup(struct device_node *node, 
					struct divs_data *data)

{

	struct clk_onecell_data *clk_data;

	const char *parent  = node->name;

	const char *parent;

	const char *clk_name;

	struct clk **clks, *pclk;

	struct clk_hw *gate_hw, *rate_hw;
@@ -883,6 +883,7 @@ static void __init sunxi_divs_clk_setup(struct device_node *node, 


	/* Set up factor clock that we will be dividing */

	pclk = sunxi_factors_clk_setup(node, data->factors);

	parent = __clk_get_name(pclk);



	reg = of_iomap(node, 0);