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Commit 97bcb0fe authored Feb 01, 2013 by Ben Dooks

ARM: set BE8 if LE in head code



If we are booting in LE and compiled for BE8, then add code to
set the state to bE8. Since the instruction stream is always LE,
we do not need to do anything special to the instruction.

Also ensure that the secondary processors are started in the same mode.

Note, we do add about 20 bytes to the kernel image, but it seems easier
to do this than adding another configuration to change.

Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Reviewed-by: Dave Martin <Dave.Martin@arm.com>
Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>

parent 2f9bf9be

arch/arm/boot/compressed/head.S

+1 −0

Original line number	Diff line number	Diff line
		@@ -135,6 +135,7 @@ start:
		.word _edata @ zImage end address
		THUMB( .thumb )
		1:
		ARM_BE8( setend be ) @ go BE8 if compiled for BE8
		mrs r9, cpsr
		#ifdef CONFIG_ARM_VIRT_EXT
		bl __hyp_stub_install @ get into SVC mode, reversibly

arch/arm/kernel/head.S

+4 −0

Original line number	Diff line number	Diff line
		@@ -77,6 +77,7 @@

		__HEAD
		ENTRY(stext)
		ARM_BE8(setend be ) @ ensure we are in BE8 mode

		THUMB( adr r9, BSYM(1f) ) @ Kernel is always entered in ARM.
		THUMB( bx r9 ) @ If this is a Thumb-2 kernel,
		@@ -352,6 +353,9 @@ ENTRY(secondary_startup)
		* the processor type - there is no need to check the machine type
		* as it has already been validated by the primary processor.
		*/

		ARM_BE8(setend be) @ ensure we are in BE8 mode

		#ifdef CONFIG_ARM_VIRT_EXT
		bl __hyp_stub_install_secondary
		#endif

arch/arm/kernel/sleep.S

+1 −0

Original line number	Diff line number	Diff line
		@@ -130,6 +130,7 @@ ENDPROC(cpu_resume_after_mmu)
		.data
		.align
		ENTRY(cpu_resume)
		ARM_BE8(setend be) @ ensure we are in BE mode
		mov r1, #0
		ALT_SMP(mrc p15, 0, r0, c0, c0, 5)
		ALT_UP_B(1f)