Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 97921a5b authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge remote branch 'anholt/drm-intel-next' of /home/airlied/kernel/drm-next into drm-core-next 

* 'anholt/drm-intel-next' of /home/airlied/kernel/drm-next: (48 commits)
  agp/intel-gtt: kill previous_size assignments
  agp/intel-gtt: kill intel_i830_tlbflush
  agp/intel: split out gmch/gtt probe, part 1
  agp/intel: kill mutli_gmch_chip
  agp/intel: uncoditionally reconfigure driver on resume
  agp/intel: split out the GTT support
  agp/intel: introduce intel-agp.h header file
  drm/i915: Don't touch PORT_HOTPLUG_EN in intel_dp_detect()
  drm/i915/pch: Use minimal number of FDI lanes (v2)
  drm/i915: Add the support of memory self-refresh on Ironlake
  drm/i915: Move Pineview CxSR and watermark code into update_wm hook.
  drm/i915: Only save/restore FBC on the platform that supports FBC
  drm/i915: Fix the incorrect argument for SDVO SET_TV_format command
  drm/i915: Add support of SDVO on Ibexpeak PCH
  drm/i915: Don't enable pipe/plane/VCO early (wait for DPMS on).
  drm/i915: do not read uninitialized ->dev_private
  Revert "drm/i915: Use a dmi quirk to skip a broken SDVO TV output."
  drm/i915: implement multifunction SDVO device support
  drm/i915: remove unused intel_pipe_get_connector()
  drm/i915: remove connector object in old output structure
  ...
parents 01bf0b64 e1583165

drivers/char/agp/agp.h

+0 −80
Original line number Diff line number Diff line
@@ -178,86 +178,6 @@ struct agp_bridge_data { 
#define PGE_EMPTY(b, p)	(!(p) || (p) == (unsigned long) (b)->scratch_page)





/* Intel registers */

#define INTEL_APSIZE	0xb4

#define INTEL_ATTBASE	0xb8

#define INTEL_AGPCTRL	0xb0

#define INTEL_NBXCFG	0x50

#define INTEL_ERRSTS	0x91



/* Intel i830 registers */

#define I830_GMCH_CTRL			0x52

#define I830_GMCH_ENABLED		0x4

#define I830_GMCH_MEM_MASK		0x1

#define I830_GMCH_MEM_64M		0x1

#define I830_GMCH_MEM_128M		0

#define I830_GMCH_GMS_MASK		0x70

#define I830_GMCH_GMS_DISABLED		0x00

#define I830_GMCH_GMS_LOCAL		0x10

#define I830_GMCH_GMS_STOLEN_512	0x20

#define I830_GMCH_GMS_STOLEN_1024	0x30

#define I830_GMCH_GMS_STOLEN_8192	0x40

#define I830_RDRAM_CHANNEL_TYPE		0x03010

#define I830_RDRAM_ND(x)		(((x) & 0x20) >> 5)

#define I830_RDRAM_DDT(x)		(((x) & 0x18) >> 3)



/* This one is for I830MP w. an external graphic card */

#define INTEL_I830_ERRSTS	0x92



/* Intel 855GM/852GM registers */

#define I855_GMCH_GMS_MASK		0xF0

#define I855_GMCH_GMS_STOLEN_0M		0x0

#define I855_GMCH_GMS_STOLEN_1M		(0x1 << 4)

#define I855_GMCH_GMS_STOLEN_4M		(0x2 << 4)

#define I855_GMCH_GMS_STOLEN_8M		(0x3 << 4)

#define I855_GMCH_GMS_STOLEN_16M	(0x4 << 4)

#define I855_GMCH_GMS_STOLEN_32M	(0x5 << 4)

#define I85X_CAPID			0x44

#define I85X_VARIANT_MASK		0x7

#define I85X_VARIANT_SHIFT		5

#define I855_GME			0x0

#define I855_GM				0x4

#define I852_GME			0x2

#define I852_GM				0x5



/* Intel i845 registers */

#define INTEL_I845_AGPM		0x51

#define INTEL_I845_ERRSTS	0xc8



/* Intel i860 registers */

#define INTEL_I860_MCHCFG	0x50

#define INTEL_I860_ERRSTS	0xc8



/* Intel i810 registers */

#define I810_GMADDR		0x10

#define I810_MMADDR		0x14

#define I810_PTE_BASE		0x10000

#define I810_PTE_MAIN_UNCACHED	0x00000000

#define I810_PTE_LOCAL		0x00000002

#define I810_PTE_VALID		0x00000001

#define I830_PTE_SYSTEM_CACHED  0x00000006

#define I810_SMRAM_MISCC	0x70

#define I810_GFX_MEM_WIN_SIZE	0x00010000

#define I810_GFX_MEM_WIN_32M	0x00010000

#define I810_GMS		0x000000c0

#define I810_GMS_DISABLE	0x00000000

#define I810_PGETBL_CTL		0x2020

#define I810_PGETBL_ENABLED	0x00000001

#define I965_PGETBL_SIZE_MASK	0x0000000e

#define I965_PGETBL_SIZE_512KB	(0 << 1)

#define I965_PGETBL_SIZE_256KB	(1 << 1)

#define I965_PGETBL_SIZE_128KB	(2 << 1)

#define I965_PGETBL_SIZE_1MB	(3 << 1)

#define I965_PGETBL_SIZE_2MB	(4 << 1)

#define I965_PGETBL_SIZE_1_5MB	(5 << 1)

#define G33_PGETBL_SIZE_MASK    (3 << 8)

#define G33_PGETBL_SIZE_1M      (1 << 8)

#define G33_PGETBL_SIZE_2M      (2 << 8)



#define I810_DRAM_CTL		0x3000

#define I810_DRAM_ROW_0		0x00000001

#define I810_DRAM_ROW_0_SDRAM	0x00000001



struct agp_device_ids {

	unsigned short device_id; /* first, to make table easier to read */

	enum chipset_type chipset;

drivers/char/agp/efficeon-agp.c

+1 −0
Original line number Diff line number Diff line
@@ -28,6 +28,7 @@ 
#include <linux/page-flags.h>

#include <linux/mm.h>

#include "agp.h"

#include "intel-agp.h"



/*

 * The real differences to the generic AGP code is