Commit 976d34e2 authored Aug 13, 2018 by Punit Agrawal Committed by Marc Zyngier Aug 13, 2018

KVM: arm/arm64: Skip updating PTE entry if no change



When there is contention on faulting in a particular page table entry
at stage 2, the break-before-make requirement of the architecture can
lead to additional refaulting due to TLB invalidation.

Avoid this by skipping a page table update if the new value of the PTE
matches the previous value.

Cc: stable@vger.kernel.org
Fixes: d5d8184d ("KVM: ARM: Memory virtualization setup")
Reviewed-by: Suzuki Poulose <suzuki.poulose@arm.com>
Acked-by: Christoffer Dall <christoffer.dall@arm.com>
Signed-off-by: Punit Agrawal <punit.agrawal@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>

parent 86658b81

virt/kvm/arm/mmu.c

+4 −0

Original line number	Diff line number	Diff line
		@@ -1147,6 +1147,10 @@ static int stage2_set_pte(struct kvm kvm, struct kvm_mmu_memory_cache cache,
		/* Create 2nd stage page table mapping - Level 3 */
		old_pte = *pte;
		if (pte_present(old_pte)) {
		/* Skip page table update if there is no change */
		if (pte_val(old_pte) == pte_val(*new_pte))
		return 0;

		kvm_set_pte(pte, __pte(0));
		kvm_tlb_flush_vmid_ipa(kvm, addr);
		} else {