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Commit 96fb88bc authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: Add and enable disp rsc support for Lahaina"

parents 0ddead96 2604230b
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+37 −7
Original line number Diff line number Diff line
@@ -1167,67 +1167,93 @@

	aggre1_noc: interconnect@16e0000 {
		compatible = "qcom,lahaina-aggre1_noc";
		reg = <0x016E0000 0x1f180>;
		#interconnect-cells = <1>;
		qcom,bcm-voter-names = "hlos";
		qcom,bcm-voters = <&apps_bcm_voter>;
		clocks = <&clock_gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
			<&clock_gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>,
			<&clock_gcc GCC_AGGRE_USB3_SEC_AXI_CLK>;
	};

	aggre2_noc: interconnect@1700000 {
		reg = <0x1700000 0x3d180>;
		compatible = "qcom,lahaina-aggre2_noc";
		#interconnect-cells = <1>;
		qcom,bcm-voter-names = "hlos";
		qcom,bcm-voters = <&apps_bcm_voter>;
		clocks = <&clock_gcc GCC_AGGRE_NOC_PCIE_0_AXI_CLK>,
			<&clock_gcc GCC_AGGRE_NOC_PCIE_1_AXI_CLK>;
	};

	clk_virt: interconnect {
		compatible = "qcom,lahaina-clk_virt";
		#interconnect-cells = <1>;
		qcom,bcm-voter-names = "hlos";
		qcom,bcm-voters = <&apps_bcm_voter>;
	};

	config_noc: interconnect@1500000 {
		reg = <0x1500000 0x28000>;
		compatible = "qcom,lahaina-config_noc";
		#interconnect-cells = <1>;
		qcom,bcm-voter-names = "hlos";
		qcom,bcm-voters = <&apps_bcm_voter>;
	};

	dc_noc: interconnect@14e0000 {
		reg = <0x90C0000 0x4200>;
		compatible = "qcom,lahaina-dc_noc";
		#interconnect-cells = <1>;
		qcom,bcm-voter-names = "hlos";
		qcom,bcm-voters = <&apps_bcm_voter>;
	};

	gem_noc: interconnect@1380000 {
		reg = <0x9100000 0xae200>;
		compatible = "qcom,lahaina-gem_noc";
		#interconnect-cells = <1>;
		qcom,bcm-voters = <&apps_bcm_voter>;
		qcom,bcm-voter-names = "hlos", "disp";
		qcom,bcm-voters = <&apps_bcm_voter>, <&disp_bcm_voter>;
	};

	lpass_ag_noc: interconnect@1480000 {
	lpass_ag_noc: interconnect@3c40000 {
		reg = <0x03c40000 0xf080>;
		compatible = "qcom,lahaina-lpass_ag_noc";
		#interconnect-cells = <1>;
		qcom,bcm-voter-names = "hlos";
		qcom,bcm-voters = <&apps_bcm_voter>;
	};

	mc_virt: interconnect@1580000 {
		reg = <0x1580000 0x4>;
		compatible = "qcom,lahaina-mc_virt";
		#interconnect-cells = <1>;
		qcom,bcm-voters = <&apps_bcm_voter>;
		qcom,bcm-voter-names = "hlos", "disp";
		qcom,bcm-voters = <&apps_bcm_voter>, <&disp_bcm_voter>;
	};

	mmss_noc: interconnect@1740000 {
		reg = <0x1740000 0x1f080>;
		compatible = "qcom,lahaina-mmss_noc";
		#interconnect-cells = <1>;
		qcom,bcm-voters = <&apps_bcm_voter>;
		qcom,bcm-voter-names = "hlos", "disp";
		qcom,bcm-voters = <&apps_bcm_voter>, <&disp_bcm_voter>;
	};

	nsp_noc: interconnect@1750000 {
	nsp_noc: interconnect@a0c0000 {
		reg = <0x0a0c0000 0x10000>;
		compatible = "qcom,lahaina-nsp_noc";
		#interconnect-cells = <1>;
		qcom,bcm-voter-names = "hlos";
		qcom,bcm-voters = <&apps_bcm_voter>;
	};

	system_noc: interconnect@1620000 {
	system_noc: interconnect@1680000 {
		reg = <0x1680000 0x1EE00>;
		compatible = "qcom,lahaina-system_noc";
		#interconnect-cells = <1>;
		qcom,bcm-voter-names = "hlos";
		qcom,bcm-voters = <&apps_bcm_voter>;
	};

@@ -1584,7 +1610,6 @@
	};

	disp_rsc: rsc@af20000 {
		status = "disabled";
		label = "disp_rsc";
		compatible = "qcom,rpmh-rsc";
		reg = <0xaf20000 0x10000>;
@@ -1596,6 +1621,11 @@
				  <SLEEP_TCS   1>,
				  <WAKE_TCS    1>,
				  <CONTROL_TCS 0>;

		disp_bcm_voter: bcm_voter {
			compatible = "qcom,bcm-voter";
		};

	};

	spmi_bus: qcom,spmi@c440000 {