Loading drivers/gpu/msm/adreno.h +4 −0 Original line number Diff line number Diff line Loading @@ -110,6 +110,8 @@ #define ADRENO_DEPRECATED BIT(19) /* The target supports ringbuffer level APRIV */ #define ADRENO_APRIV BIT(20) /* The GMU supports Battery Current Limiting */ #define ADRENO_BCL BIT(21) /* * Adreno GPU quirks - control bits for various workarounds */ Loading Loading @@ -529,6 +531,8 @@ struct adreno_device { bool throttling_enabled; /** @sptp_pc_enabled: True if SPTP power collapse is enabled on a5xx */ bool sptp_pc_enabled; /** @bcl_enabled: True if BCL is enabled */ bool bcl_enabled; struct kgsl_memdesc *profile_buffer; unsigned int profile_index; struct kgsl_memdesc *pwrup_reglist; Loading drivers/gpu/msm/adreno_a6xx_gmu.c +3 −0 Original line number Diff line number Diff line Loading @@ -2697,6 +2697,9 @@ static int a6xx_gmu_probe(struct kgsl_device *device, else gmu->idle_level = GPU_HW_ACTIVE; if (ADRENO_FEATURE(adreno_dev, ADRENO_BCL)) adreno_dev->bcl_enabled = true; a6xx_gmu_acd_probe(device, gmu, pdev->dev.of_node); set_bit(GMU_ENABLED, &device->gmu_core.flags); Loading drivers/gpu/msm/adreno_a6xx_hfi.c +16 −0 Original line number Diff line number Diff line Loading @@ -635,6 +635,18 @@ static int a6xx_hfi_verify_fw_version(struct adreno_device *adreno_dev) return 0; } static int a6xx_hfi_send_bcl_feature_ctrl(struct adreno_device *adreno_dev) { int ret; if (!adreno_dev->bcl_enabled) return 0; ret = a6xx_hfi_send_feature_ctrl(adreno_dev, HFI_FEATURE_BCL, 1, 0); return ret; } static int a6xx_hfi_send_lm_feature_ctrl(struct adreno_device *adreno_dev) { struct kgsl_device *device = KGSL_DEVICE(adreno_dev); Loading Loading @@ -739,6 +751,10 @@ int a6xx_hfi_start(struct adreno_device *adreno_dev) if (result) goto err; result = a6xx_hfi_send_bcl_feature_ctrl(adreno_dev); if (result) goto err; result = a6xx_hfi_send_core_fw_start(adreno_dev); if (result) goto err; Loading drivers/gpu/msm/adreno_sysfs.c +17 −0 Original line number Diff line number Diff line Loading @@ -264,6 +264,21 @@ static int _acd_store(struct adreno_device *adreno_dev, bool val) return gmu_core_dev_acd_set(KGSL_DEVICE(adreno_dev), val); } static bool _bcl_show(struct adreno_device *adreno_dev) { return adreno_dev->bcl_enabled; } static int _bcl_store(struct adreno_device *adreno_dev, bool val) { if (!ADRENO_FEATURE(adreno_dev, ADRENO_BCL) || adreno_dev->bcl_enabled == val) return 0; return adreno_power_cycle_bool(adreno_dev, &adreno_dev->bcl_enabled, val); } static ssize_t _sysfs_store_u32(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) Loading Loading @@ -376,6 +391,7 @@ static ADRENO_SYSFS_BOOL(throttling); static ADRENO_SYSFS_BOOL(ifpc); static ADRENO_SYSFS_RO_U32(ifpc_count); static ADRENO_SYSFS_BOOL(acd); static ADRENO_SYSFS_BOOL(bcl); static const struct attribute *_attr_list[] = { Loading @@ -399,6 +415,7 @@ static const struct attribute *_attr_list[] = { &adreno_attr_ifpc_count.attr.attr, &adreno_attr_preempt_count.attr.attr, &adreno_attr_acd.attr.attr, &adreno_attr_bcl.attr.attr, NULL, }; Loading Loading
drivers/gpu/msm/adreno.h +4 −0 Original line number Diff line number Diff line Loading @@ -110,6 +110,8 @@ #define ADRENO_DEPRECATED BIT(19) /* The target supports ringbuffer level APRIV */ #define ADRENO_APRIV BIT(20) /* The GMU supports Battery Current Limiting */ #define ADRENO_BCL BIT(21) /* * Adreno GPU quirks - control bits for various workarounds */ Loading Loading @@ -529,6 +531,8 @@ struct adreno_device { bool throttling_enabled; /** @sptp_pc_enabled: True if SPTP power collapse is enabled on a5xx */ bool sptp_pc_enabled; /** @bcl_enabled: True if BCL is enabled */ bool bcl_enabled; struct kgsl_memdesc *profile_buffer; unsigned int profile_index; struct kgsl_memdesc *pwrup_reglist; Loading
drivers/gpu/msm/adreno_a6xx_gmu.c +3 −0 Original line number Diff line number Diff line Loading @@ -2697,6 +2697,9 @@ static int a6xx_gmu_probe(struct kgsl_device *device, else gmu->idle_level = GPU_HW_ACTIVE; if (ADRENO_FEATURE(adreno_dev, ADRENO_BCL)) adreno_dev->bcl_enabled = true; a6xx_gmu_acd_probe(device, gmu, pdev->dev.of_node); set_bit(GMU_ENABLED, &device->gmu_core.flags); Loading
drivers/gpu/msm/adreno_a6xx_hfi.c +16 −0 Original line number Diff line number Diff line Loading @@ -635,6 +635,18 @@ static int a6xx_hfi_verify_fw_version(struct adreno_device *adreno_dev) return 0; } static int a6xx_hfi_send_bcl_feature_ctrl(struct adreno_device *adreno_dev) { int ret; if (!adreno_dev->bcl_enabled) return 0; ret = a6xx_hfi_send_feature_ctrl(adreno_dev, HFI_FEATURE_BCL, 1, 0); return ret; } static int a6xx_hfi_send_lm_feature_ctrl(struct adreno_device *adreno_dev) { struct kgsl_device *device = KGSL_DEVICE(adreno_dev); Loading Loading @@ -739,6 +751,10 @@ int a6xx_hfi_start(struct adreno_device *adreno_dev) if (result) goto err; result = a6xx_hfi_send_bcl_feature_ctrl(adreno_dev); if (result) goto err; result = a6xx_hfi_send_core_fw_start(adreno_dev); if (result) goto err; Loading
drivers/gpu/msm/adreno_sysfs.c +17 −0 Original line number Diff line number Diff line Loading @@ -264,6 +264,21 @@ static int _acd_store(struct adreno_device *adreno_dev, bool val) return gmu_core_dev_acd_set(KGSL_DEVICE(adreno_dev), val); } static bool _bcl_show(struct adreno_device *adreno_dev) { return adreno_dev->bcl_enabled; } static int _bcl_store(struct adreno_device *adreno_dev, bool val) { if (!ADRENO_FEATURE(adreno_dev, ADRENO_BCL) || adreno_dev->bcl_enabled == val) return 0; return adreno_power_cycle_bool(adreno_dev, &adreno_dev->bcl_enabled, val); } static ssize_t _sysfs_store_u32(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) Loading Loading @@ -376,6 +391,7 @@ static ADRENO_SYSFS_BOOL(throttling); static ADRENO_SYSFS_BOOL(ifpc); static ADRENO_SYSFS_RO_U32(ifpc_count); static ADRENO_SYSFS_BOOL(acd); static ADRENO_SYSFS_BOOL(bcl); static const struct attribute *_attr_list[] = { Loading @@ -399,6 +415,7 @@ static const struct attribute *_attr_list[] = { &adreno_attr_ifpc_count.attr.attr, &adreno_attr_preempt_count.attr.attr, &adreno_attr_acd.attr.attr, &adreno_attr_bcl.attr.attr, NULL, }; Loading