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Commit 961729bf authored by Christoph Hellwig's avatar Christoph Hellwig
Browse files

openrisc: remove the partial DMA_ATTR_NON_CONSISTENT support 



The openrisc DMA code supports DMA_ATTR_NON_CONSISTENT allocations, but
does not provide a cache_sync operation.  This means any user of it
will never be able to actually transfer cache ownership and thus cause
coherency bugs.

Signed-off-by: default avatarChristoph Hellwig <hch@lst.de>
Acked-by: default avatarStafford Horne <shorne@gmail.com>
parent 80e61fcd

arch/openrisc/kernel/dma.c

+9 −13
Original line number Diff line number Diff line
@@ -98,7 +98,6 @@ arch_dma_alloc(struct device *dev, size_t size, dma_addr_t *dma_handle, 


	va = (unsigned long)page;



	if ((attrs & DMA_ATTR_NON_CONSISTENT) == 0) {

	/*

	 * We need to iterate through the pages, clearing the dcache for

	 * them and setting the cache-inhibit bit.
@@ -107,7 +106,6 @@ arch_dma_alloc(struct device *dev, size_t size, dma_addr_t *dma_handle, 
		free_pages_exact(page, size);

		return NULL;

	}

	}



	return (void *)va;

}
@@ -122,10 +120,8 @@ arch_dma_free(struct device *dev, size_t size, void *vaddr, 
		.mm = &init_mm

	};



	if ((attrs & DMA_ATTR_NON_CONSISTENT) == 0) {

	/* walk_page_range shouldn't be able to fail here */

	WARN_ON(walk_page_range(va, va + size, &walk));

	}



	free_pages_exact(vaddr, size);

}