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Commit 9525cc53 authored May 31, 2017 by David S. Miller

Merge branch 'dsa-mv88e6xxx-PHY-nitpicks'



Vivien Didelot says:

====================
net: dsa: mv88e6xxx: PHY nitpicks

This patchset isolates more PPU code into phy.c and makes distinction
between PHY Registers read and write implementations vs. generic PHY
routines.
====================

Signed-off-by: David S. Miller <davem@davemloft.net>

parents ffe40645 b15a7c03

drivers/net/dsa/mv88e6xxx/chip.c

+12 −15

Original line number	Diff line number	Diff line
		@@ -2034,13 +2034,6 @@ static int mv88e6xxx_g1_setup(struct mv88e6xxx_chip *chip)
		u32 upstream_port = dsa_upstream_port(ds);
		int err;

		/* Enable the PHY Polling Unit if present, don't discard any packets,
		* and mask all interrupt sources.
		*/
		err = mv88e6xxx_ppu_enable(chip);
		if (err)
		return err;

		if (chip->info->ops->g1_set_cpu_port) {
		err = chip->info->ops->g1_set_cpu_port(chip, upstream_port);
		if (err)
		@@ -2140,6 +2133,10 @@ static int mv88e6xxx_setup(struct dsa_switch *ds)
		goto unlock;
		}

		err = mv88e6xxx_phy_setup(chip);
		if (err)
		goto unlock;

		err = mv88e6xxx_vtu_setup(chip);
		if (err)
		goto unlock;
		@@ -2374,8 +2371,8 @@ static int mv88e6xxx_set_eeprom(struct dsa_switch *ds,
		static const struct mv88e6xxx_ops mv88e6085_ops = {
		/* MV88E6XXX_FAMILY_6097 */
		.set_switch_mac = mv88e6xxx_g1_set_switch_mac,
		.phy_read = mv88e6xxx_phy_ppu_read,
		.phy_write = mv88e6xxx_phy_ppu_write,
		.phy_read = mv88e6185_phy_ppu_read,
		.phy_write = mv88e6185_phy_ppu_write,
		.port_set_link = mv88e6xxx_port_set_link,
		.port_set_duplex = mv88e6xxx_port_set_duplex,
		.port_set_speed = mv88e6185_port_set_speed,
		@@ -2405,8 +2402,8 @@ static const struct mv88e6xxx_ops mv88e6085_ops = {
		static const struct mv88e6xxx_ops mv88e6095_ops = {
		/* MV88E6XXX_FAMILY_6095 */
		.set_switch_mac = mv88e6xxx_g1_set_switch_mac,
		.phy_read = mv88e6xxx_phy_ppu_read,
		.phy_write = mv88e6xxx_phy_ppu_write,
		.phy_read = mv88e6185_phy_ppu_read,
		.phy_write = mv88e6185_phy_ppu_write,
		.port_set_link = mv88e6xxx_port_set_link,
		.port_set_duplex = mv88e6xxx_port_set_duplex,
		.port_set_speed = mv88e6185_port_set_speed,
		@@ -2483,8 +2480,8 @@ static const struct mv88e6xxx_ops mv88e6123_ops = {
		static const struct mv88e6xxx_ops mv88e6131_ops = {
		/* MV88E6XXX_FAMILY_6185 */
		.set_switch_mac = mv88e6xxx_g1_set_switch_mac,
		.phy_read = mv88e6xxx_phy_ppu_read,
		.phy_write = mv88e6xxx_phy_ppu_write,
		.phy_read = mv88e6185_phy_ppu_read,
		.phy_write = mv88e6185_phy_ppu_write,
		.port_set_link = mv88e6xxx_port_set_link,
		.port_set_duplex = mv88e6xxx_port_set_duplex,
		.port_set_speed = mv88e6185_port_set_speed,
		@@ -2730,8 +2727,8 @@ static const struct mv88e6xxx_ops mv88e6176_ops = {
		static const struct mv88e6xxx_ops mv88e6185_ops = {
		/* MV88E6XXX_FAMILY_6185 */
		.set_switch_mac = mv88e6xxx_g1_set_switch_mac,
		.phy_read = mv88e6xxx_phy_ppu_read,
		.phy_write = mv88e6xxx_phy_ppu_write,
		.phy_read = mv88e6185_phy_ppu_read,
		.phy_write = mv88e6185_phy_ppu_write,
		.port_set_link = mv88e6xxx_port_set_link,
		.port_set_duplex = mv88e6xxx_port_set_duplex,
		.port_set_speed = mv88e6185_port_set_speed,

drivers/net/dsa/mv88e6xxx/phy.c

+25 −20

Original line number	Diff line number	Diff line
		@@ -116,7 +116,7 @@ int mv88e6xxx_phy_page_write(struct mv88e6xxx_chip *chip, int phy,
		return err;
		}

		static int mv88e6xxx_ppu_disable(struct mv88e6xxx_chip *chip)
		static int mv88e6xxx_phy_ppu_disable(struct mv88e6xxx_chip *chip)
		{
		if (!chip->info->ops->ppu_disable)
		return 0;
		@@ -124,7 +124,7 @@ static int mv88e6xxx_ppu_disable(struct mv88e6xxx_chip *chip)
		return chip->info->ops->ppu_disable(chip);
		}

		int mv88e6xxx_ppu_enable(struct mv88e6xxx_chip *chip)
		static int mv88e6xxx_phy_ppu_enable(struct mv88e6xxx_chip *chip)
		{
		if (!chip->info->ops->ppu_enable)
		return 0;
		@@ -132,7 +132,7 @@ int mv88e6xxx_ppu_enable(struct mv88e6xxx_chip *chip)
		return chip->info->ops->ppu_enable(chip);
		}

		static void mv88e6xxx_ppu_reenable_work(struct work_struct *ugly)
		static void mv88e6xxx_phy_ppu_reenable_work(struct work_struct *ugly)
		{
		struct mv88e6xxx_chip *chip;

		@@ -141,7 +141,7 @@ static void mv88e6xxx_ppu_reenable_work(struct work_struct *ugly)
		mutex_lock(&chip->reg_lock);

		if (mutex_trylock(&chip->ppu_mutex)) {
		if (mv88e6xxx_ppu_enable(chip) == 0)
		if (mv88e6xxx_phy_ppu_enable(chip) == 0)
		chip->ppu_disabled = 0;
		mutex_unlock(&chip->ppu_mutex);
		}
		@@ -149,14 +149,14 @@ static void mv88e6xxx_ppu_reenable_work(struct work_struct *ugly)
		mutex_unlock(&chip->reg_lock);
		}

		static void mv88e6xxx_ppu_reenable_timer(unsigned long _ps)
		static void mv88e6xxx_phy_ppu_reenable_timer(unsigned long _ps)
		{
		struct mv88e6xxx_chip chip = (void )_ps;

		schedule_work(&chip->ppu_work);
		}

		static int mv88e6xxx_ppu_access_get(struct mv88e6xxx_chip *chip)
		static int mv88e6xxx_phy_ppu_access_get(struct mv88e6xxx_chip *chip)
		{
		int ret;

		@@ -168,7 +168,7 @@ static int mv88e6xxx_ppu_access_get(struct mv88e6xxx_chip *chip)
		* it.
		*/
		if (!chip->ppu_disabled) {
		ret = mv88e6xxx_ppu_disable(chip);
		ret = mv88e6xxx_phy_ppu_disable(chip);
		if (ret < 0) {
		mutex_unlock(&chip->ppu_mutex);
		return ret;
		@@ -182,49 +182,49 @@ static int mv88e6xxx_ppu_access_get(struct mv88e6xxx_chip *chip)
		return ret;
		}

		static void mv88e6xxx_ppu_access_put(struct mv88e6xxx_chip *chip)
		static void mv88e6xxx_phy_ppu_access_put(struct mv88e6xxx_chip *chip)
		{
		/* Schedule a timer to re-enable the PHY polling unit. */
		mod_timer(&chip->ppu_timer, jiffies + msecs_to_jiffies(10));
		mutex_unlock(&chip->ppu_mutex);
		}

		static void mv88e6xxx_ppu_state_init(struct mv88e6xxx_chip *chip)
		static void mv88e6xxx_phy_ppu_state_init(struct mv88e6xxx_chip *chip)
		{
		mutex_init(&chip->ppu_mutex);
		INIT_WORK(&chip->ppu_work, mv88e6xxx_ppu_reenable_work);
		setup_timer(&chip->ppu_timer, mv88e6xxx_ppu_reenable_timer,
		INIT_WORK(&chip->ppu_work, mv88e6xxx_phy_ppu_reenable_work);
		setup_timer(&chip->ppu_timer, mv88e6xxx_phy_ppu_reenable_timer,
		(unsigned long)chip);
		}

		static void mv88e6xxx_ppu_state_destroy(struct mv88e6xxx_chip *chip)
		static void mv88e6xxx_phy_ppu_state_destroy(struct mv88e6xxx_chip *chip)
		{
		del_timer_sync(&chip->ppu_timer);
		}

		int mv88e6xxx_phy_ppu_read(struct mv88e6xxx_chip chip, struct mii_bus bus,
		int mv88e6185_phy_ppu_read(struct mv88e6xxx_chip chip, struct mii_bus bus,
		int addr, int reg, u16 *val)
		{
		int err;

		err = mv88e6xxx_ppu_access_get(chip);
		err = mv88e6xxx_phy_ppu_access_get(chip);
		if (!err) {
		err = mv88e6xxx_read(chip, addr, reg, val);
		mv88e6xxx_ppu_access_put(chip);
		mv88e6xxx_phy_ppu_access_put(chip);
		}

		return err;
		}

		int mv88e6xxx_phy_ppu_write(struct mv88e6xxx_chip chip, struct mii_bus bus,
		int mv88e6185_phy_ppu_write(struct mv88e6xxx_chip chip, struct mii_bus bus,
		int addr, int reg, u16 val)
		{
		int err;

		err = mv88e6xxx_ppu_access_get(chip);
		err = mv88e6xxx_phy_ppu_access_get(chip);
		if (!err) {
		err = mv88e6xxx_write(chip, addr, reg, val);
		mv88e6xxx_ppu_access_put(chip);
		mv88e6xxx_phy_ppu_access_put(chip);
		}

		return err;
		@@ -233,11 +233,16 @@ int mv88e6xxx_phy_ppu_write(struct mv88e6xxx_chip chip, struct mii_bus bus,
		void mv88e6xxx_phy_init(struct mv88e6xxx_chip *chip)
		{
		if (chip->info->ops->ppu_enable && chip->info->ops->ppu_disable)
		mv88e6xxx_ppu_state_init(chip);
		mv88e6xxx_phy_ppu_state_init(chip);
		}

		void mv88e6xxx_phy_destroy(struct mv88e6xxx_chip *chip)
		{
		if (chip->info->ops->ppu_enable && chip->info->ops->ppu_disable)
		mv88e6xxx_ppu_state_destroy(chip);
		mv88e6xxx_phy_ppu_state_destroy(chip);
		}

		int mv88e6xxx_phy_setup(struct mv88e6xxx_chip *chip)
		{
		return mv88e6xxx_phy_ppu_enable(chip);
		}

drivers/net/dsa/mv88e6xxx/phy.h

+8 −5

Original line number	Diff line number	Diff line
		@@ -14,10 +14,17 @@
		#ifndef _MV88E6XXX_PHY_H
		#define _MV88E6XXX_PHY_H

		/* PHY Registers accesses implementations */
		int mv88e6165_phy_read(struct mv88e6xxx_chip chip, struct mii_bus bus,
		int addr, int reg, u16 *val);
		int mv88e6165_phy_write(struct mv88e6xxx_chip chip, struct mii_bus bus,
		int addr, int reg, u16 val);
		int mv88e6185_phy_ppu_read(struct mv88e6xxx_chip chip, struct mii_bus bus,
		int addr, int reg, u16 *val);
		int mv88e6185_phy_ppu_write(struct mv88e6xxx_chip chip, struct mii_bus bus,
		int addr, int reg, u16 val);

		/* Generic PHY operations */
		int mv88e6xxx_phy_read(struct mv88e6xxx_chip *chip, int phy,
		int reg, u16 *val);
		int mv88e6xxx_phy_write(struct mv88e6xxx_chip *chip, int phy,
		@@ -26,12 +33,8 @@ int mv88e6xxx_phy_page_read(struct mv88e6xxx_chip *chip, int phy,
		u8 page, int reg, u16 *val);
		int mv88e6xxx_phy_page_write(struct mv88e6xxx_chip *chip, int phy,
		u8 page, int reg, u16 val);
		int mv88e6xxx_phy_ppu_read(struct mv88e6xxx_chip chip, struct mii_bus bus,
		int addr, int reg, u16 *val);
		int mv88e6xxx_phy_ppu_write(struct mv88e6xxx_chip chip, struct mii_bus bus,
		int addr, int reg, u16 val);
		int mv88e6xxx_ppu_enable(struct mv88e6xxx_chip *chip);
		void mv88e6xxx_phy_init(struct mv88e6xxx_chip *chip);
		void mv88e6xxx_phy_destroy(struct mv88e6xxx_chip *chip);
		int mv88e6xxx_phy_setup(struct mv88e6xxx_chip *chip);

		#endif /_MV88E6XXX_PHY_H /