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Commit 952418a3 authored by Caesar Wang's avatar Caesar Wang Committed by Eduardo Valentin
Browse files

thermal: rockchip: the rename compatibles for rockchip SoCs 



This patch renames to be more adapter compatibles since more and more
SoCs are supported in thermal driver.

Reported-by: default avatarHuang,Tao <huangtao@rock-chips.com>
Signed-off-by: default avatarCaesar Wang <wxt@rock-chips.com>
Signed-off-by: default avatarEduardo Valentin <edubezval@gmail.com>
parent 1d37a037

drivers/thermal/rockchip_thermal.c

+28 −22
Original line number Original line Diff line number Diff line
@@ -58,8 +58,8 @@ enum sensor_id { 




/**

/**

 * The conversion table has the adc value and temperature.

 * The conversion table has the adc value and temperature.

 * ADC_DECREMENT: the adc value is of diminishing.(e.g. v2_code_table)

 * ADC_DECREMENT: the adc value is of diminishing.(e.g. rk3288_code_table)

 * ADC_INCREMENT: the adc value is incremental.(e.g. v3_code_table)

 * ADC_INCREMENT: the adc value is incremental.(e.g. rk3368_code_table)

 */

 */

enum adc_sort_mode {

enum adc_sort_mode {

	ADC_DECREMENT = 0,

	ADC_DECREMENT = 0,
@@ -135,7 +135,13 @@ struct rockchip_thermal_data { 
	enum tshut_polarity tshut_polarity;

	enum tshut_polarity tshut_polarity;

};

};





/* TSADC Sensor info define: */

/**

 * TSADC Sensor Register description:

 *

 * TSADCV2_* are used for RK3288 SoCs, the other chips can reuse it.

 * TSADCV3_* are used for newer SoCs than RK3288. (e.g: RK3228, RK3399)

 *

 */

#define TSADCV2_AUTO_CON			0x04

#define TSADCV2_AUTO_CON			0x04

#define TSADCV2_INT_EN				0x08

#define TSADCV2_INT_EN				0x08

#define TSADCV2_INT_PD				0x0c

#define TSADCV2_INT_PD				0x0c
@@ -154,8 +160,8 @@ struct rockchip_thermal_data { 
#define TSADCV2_SHUT_2GPIO_SRC_EN(chn)		BIT(4 + (chn))

#define TSADCV2_SHUT_2GPIO_SRC_EN(chn)		BIT(4 + (chn))

#define TSADCV2_SHUT_2CRU_SRC_EN(chn)		BIT(8 + (chn))

#define TSADCV2_SHUT_2CRU_SRC_EN(chn)		BIT(8 + (chn))





#define TSADCV1_INT_PD_CLEAR_MASK		~BIT(16)

#define TSADCV2_INT_PD_CLEAR_MASK		~BIT(8)

#define TSADCV2_INT_PD_CLEAR_MASK		~BIT(8)

#define TSADCV3_INT_PD_CLEAR_MASK		~BIT(16)





#define TSADCV2_DATA_MASK			0xfff

#define TSADCV2_DATA_MASK			0xfff

#define TSADCV3_DATA_MASK			0x3ff

#define TSADCV3_DATA_MASK			0x3ff
@@ -177,7 +183,7 @@ struct tsadc_table { 
 * linearly interpolated.

 * linearly interpolated.

 * Code to Temperature mapping should be updated based on sillcon results.

 * Code to Temperature mapping should be updated based on sillcon results.

 */

 */

static const struct tsadc_table v1_code_table[] = {

static const struct tsadc_table rk3228_code_table[] = {

	{TSADCV3_DATA_MASK, -40000},

	{TSADCV3_DATA_MASK, -40000},

	{436, -40000},

	{436, -40000},

	{431, -35000},

	{431, -35000},
@@ -215,7 +221,7 @@ static const struct tsadc_table v1_code_table[] = { 
	{264, 125000},

	{264, 125000},

};

};





static const struct tsadc_table v2_code_table[] = {

static const struct tsadc_table rk3288_code_table[] = {

	{TSADCV2_DATA_MASK, -40000},

	{TSADCV2_DATA_MASK, -40000},

	{3800, -40000},

	{3800, -40000},

	{3792, -35000},

	{3792, -35000},
@@ -253,7 +259,7 @@ static const struct tsadc_table v2_code_table[] = { 
	{3421, 125000},

	{3421, 125000},

};

};





static const struct tsadc_table v3_code_table[] = {

static const struct tsadc_table rk3368_code_table[] = {

	{0, -40000},

	{0, -40000},

	{106, -40000},

	{106, -40000},

	{108, -35000},

	{108, -35000},
@@ -292,7 +298,7 @@ static const struct tsadc_table v3_code_table[] = { 
	{TSADCV3_DATA_MASK, 125000},

	{TSADCV3_DATA_MASK, 125000},

};

};





static const struct tsadc_table v4_code_table[] = {

static const struct tsadc_table rk3399_code_table[] = {

	{TSADCV3_DATA_MASK, -40000},

	{TSADCV3_DATA_MASK, -40000},

	{431, -40000},

	{431, -40000},

	{426, -35000},

	{426, -35000},
@@ -453,20 +459,20 @@ static void rk_tsadcv2_initialize(void __iomem *regs, 
		       regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);

		       regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);

}

}





static void rk_tsadcv1_irq_ack(void __iomem *regs)

static void rk_tsadcv2_irq_ack(void __iomem *regs)

{

{

	u32 val;

	u32 val;





	val = readl_relaxed(regs + TSADCV2_INT_PD);

	val = readl_relaxed(regs + TSADCV2_INT_PD);

	writel_relaxed(val & TSADCV1_INT_PD_CLEAR_MASK, regs + TSADCV2_INT_PD);

	writel_relaxed(val & TSADCV2_INT_PD_CLEAR_MASK, regs + TSADCV2_INT_PD);

}

}





static void rk_tsadcv2_irq_ack(void __iomem *regs)

static void rk_tsadcv3_irq_ack(void __iomem *regs)

{

{

	u32 val;

	u32 val;





	val = readl_relaxed(regs + TSADCV2_INT_PD);

	val = readl_relaxed(regs + TSADCV2_INT_PD);

	writel_relaxed(val & TSADCV2_INT_PD_CLEAR_MASK, regs + TSADCV2_INT_PD);

	writel_relaxed(val & TSADCV3_INT_PD_CLEAR_MASK, regs + TSADCV2_INT_PD);

}

}





static void rk_tsadcv2_control(void __iomem *regs, bool enable)

static void rk_tsadcv2_control(void __iomem *regs, bool enable)
@@ -531,15 +537,15 @@ static const struct rockchip_tsadc_chip rk3228_tsadc_data = { 
	.tshut_temp = 95000,

	.tshut_temp = 95000,





	.initialize = rk_tsadcv2_initialize,

	.initialize = rk_tsadcv2_initialize,

	.irq_ack = rk_tsadcv1_irq_ack,

	.irq_ack = rk_tsadcv3_irq_ack,

	.control = rk_tsadcv2_control,

	.control = rk_tsadcv2_control,

	.get_temp = rk_tsadcv2_get_temp,

	.get_temp = rk_tsadcv2_get_temp,

	.set_tshut_temp = rk_tsadcv2_tshut_temp,

	.set_tshut_temp = rk_tsadcv2_tshut_temp,

	.set_tshut_mode = rk_tsadcv2_tshut_mode,

	.set_tshut_mode = rk_tsadcv2_tshut_mode,





	.table = {

	.table = {

		.id = v1_code_table,

		.id = rk3228_code_table,

		.length = ARRAY_SIZE(v1_code_table),

		.length = ARRAY_SIZE(rk3228_code_table),

		.data_mask = TSADCV3_DATA_MASK,

		.data_mask = TSADCV3_DATA_MASK,

		.mode = ADC_DECREMENT,

		.mode = ADC_DECREMENT,

	},

	},
@@ -562,8 +568,8 @@ static const struct rockchip_tsadc_chip rk3288_tsadc_data = { 
	.set_tshut_mode = rk_tsadcv2_tshut_mode,

	.set_tshut_mode = rk_tsadcv2_tshut_mode,





	.table = {

	.table = {

		.id = v2_code_table,

		.id = rk3288_code_table,

		.length = ARRAY_SIZE(v2_code_table),

		.length = ARRAY_SIZE(rk3288_code_table),

		.data_mask = TSADCV2_DATA_MASK,

		.data_mask = TSADCV2_DATA_MASK,

		.mode = ADC_DECREMENT,

		.mode = ADC_DECREMENT,

	},

	},
@@ -586,8 +592,8 @@ static const struct rockchip_tsadc_chip rk3368_tsadc_data = { 
	.set_tshut_mode = rk_tsadcv2_tshut_mode,

	.set_tshut_mode = rk_tsadcv2_tshut_mode,





	.table = {

	.table = {

		.id = v3_code_table,

		.id = rk3368_code_table,

		.length = ARRAY_SIZE(v3_code_table),

		.length = ARRAY_SIZE(rk3368_code_table),

		.data_mask = TSADCV3_DATA_MASK,

		.data_mask = TSADCV3_DATA_MASK,

		.mode = ADC_INCREMENT,

		.mode = ADC_INCREMENT,

	},

	},
@@ -603,15 +609,15 @@ static const struct rockchip_tsadc_chip rk3399_tsadc_data = { 
	.tshut_temp = 95000,

	.tshut_temp = 95000,





	.initialize = rk_tsadcv2_initialize,

	.initialize = rk_tsadcv2_initialize,

	.irq_ack = rk_tsadcv1_irq_ack,

	.irq_ack = rk_tsadcv3_irq_ack,

	.control = rk_tsadcv2_control,

	.control = rk_tsadcv2_control,

	.get_temp = rk_tsadcv2_get_temp,

	.get_temp = rk_tsadcv2_get_temp,

	.set_tshut_temp = rk_tsadcv2_tshut_temp,

	.set_tshut_temp = rk_tsadcv2_tshut_temp,

	.set_tshut_mode = rk_tsadcv2_tshut_mode,

	.set_tshut_mode = rk_tsadcv2_tshut_mode,





	.table = {

	.table = {

		.id = v4_code_table,

		.id = rk3399_code_table,

		.length = ARRAY_SIZE(v4_code_table),

		.length = ARRAY_SIZE(rk3399_code_table),

		.data_mask = TSADCV3_DATA_MASK,

		.data_mask = TSADCV3_DATA_MASK,

		.mode = ADC_DECREMENT,

		.mode = ADC_DECREMENT,

	},

	},