Merge git://git.kernel.org/pub/scm/linux/kernel/git/wim/linux-2.6-watchdog (94a9f8ad) · Commits · e / devices / android_kernel_fairphone_FP5

arch/arm/mach-orion5x/include/mach/orion5x.h

+2 −0

Original line number	Original line	Diff line number	Diff line
	@@ -157,9 +157,11 @@
	#define CPU_CONF ORION5X_BRIDGE_REG(0x100)		#define CPU_CONF ORION5X_BRIDGE_REG(0x100)
	#define CPU_CTRL ORION5X_BRIDGE_REG(0x104)		#define CPU_CTRL ORION5X_BRIDGE_REG(0x104)
	#define CPU_RESET_MASK ORION5X_BRIDGE_REG(0x108)		#define CPU_RESET_MASK ORION5X_BRIDGE_REG(0x108)
			#define WDT_RESET 0x0002
	#define CPU_SOFT_RESET ORION5X_BRIDGE_REG(0x10c)		#define CPU_SOFT_RESET ORION5X_BRIDGE_REG(0x10c)
	#define POWER_MNG_CTRL_REG ORION5X_BRIDGE_REG(0x11C)		#define POWER_MNG_CTRL_REG ORION5X_BRIDGE_REG(0x11C)
	#define BRIDGE_CAUSE ORION5X_BRIDGE_REG(0x110)		#define BRIDGE_CAUSE ORION5X_BRIDGE_REG(0x110)
			#define WDT_INT_REQ 0x0008
	#define BRIDGE_MASK ORION5X_BRIDGE_REG(0x114)		#define BRIDGE_MASK ORION5X_BRIDGE_REG(0x114)
	#define BRIDGE_INT_TIMER0 0x0002		#define BRIDGE_INT_TIMER0 0x0002
	#define BRIDGE_INT_TIMER1 0x0004		#define BRIDGE_INT_TIMER1 0x0004

arch/arm/plat-omap/devices.c

+13 −8

Original line number	Original line	Diff line number	Diff line
	@@ -441,16 +441,8 @@ static inline void omap_init_uwire(void) {}

	#if defined(CONFIG_OMAP_WATCHDOG) \|\| defined(CONFIG_OMAP_WATCHDOG_MODULE)		#if defined(CONFIG_OMAP_WATCHDOG) \|\| defined(CONFIG_OMAP_WATCHDOG_MODULE)

	#ifdef CONFIG_ARCH_OMAP24XX
	#define OMAP_WDT_BASE 0x48022000
	#else
	#define OMAP_WDT_BASE 0xfffeb000
	#endif

	static struct resource wdt_resources[] = {		static struct resource wdt_resources[] = {
	{		{
	.start = OMAP_WDT_BASE,
	.end = OMAP_WDT_BASE + 0x4f,
	.flags = IORESOURCE_MEM,		.flags = IORESOURCE_MEM,
	},		},
	};		};
	@@ -464,6 +456,19 @@ static struct platform_device omap_wdt_device = {

	static void omap_init_wdt(void)		static void omap_init_wdt(void)
	{		{
			if (cpu_is_omap16xx())
			wdt_resources[0].start = 0xfffeb000;
			else if (cpu_is_omap2420())
			wdt_resources[0].start = 0x48022000; /* WDT2 */
			else if (cpu_is_omap2430())
			wdt_resources[0].start = 0x49016000; /* WDT2 */
			else if (cpu_is_omap343x())
			wdt_resources[0].start = 0x48314000; /* WDT2 */
			else
			return;

			wdt_resources[0].end = wdt_resources[0].start + 0x4f;

	(void) platform_device_register(&omap_wdt_device);		(void) platform_device_register(&omap_wdt_device);
	}		}
	#else		#else

drivers/watchdog/Kconfig

+43 −0

Original line number	Original line	Diff line number	Diff line
	@@ -66,6 +66,13 @@ config AT91RM9200_WATCHDOG
	Watchdog timer embedded into AT91RM9200 chips. This will reboot your		Watchdog timer embedded into AT91RM9200 chips. This will reboot your
	system when the timeout is reached.		system when the timeout is reached.

			config AT91SAM9X_WATCHDOG
			tristate "AT91SAM9X watchdog"
			depends on WATCHDOG && (ARCH_AT91SAM9260 \|\| ARCH_AT91SAM9261)
			help
			Watchdog timer embedded into AT91SAM9X chips. This will reboot your
			system when the timeout is reached.

	config 21285_WATCHDOG		config 21285_WATCHDOG
	tristate "DC21285 watchdog"		tristate "DC21285 watchdog"
	depends on FOOTBRIDGE		depends on FOOTBRIDGE
	@@ -217,6 +224,15 @@ config DAVINCI_WATCHDOG
	NOTE: once enabled, this timer cannot be disabled.		NOTE: once enabled, this timer cannot be disabled.
	Say N if you are unsure.		Say N if you are unsure.

			config ORION5X_WATCHDOG
			tristate "Orion5x watchdog"
			depends on ARCH_ORION5X
			help
			Say Y here if to include support for the watchdog timer
			in the Orion5x ARM SoCs.
			To compile this driver as a module, choose M here: the
			module will be called orion5x_wdt.

	# ARM26 Architecture		# ARM26 Architecture

	# AVR32 Architecture		# AVR32 Architecture
	@@ -416,6 +432,18 @@ config IT8712F_WDT
	To compile this driver as a module, choose M here: the		To compile this driver as a module, choose M here: the
	module will be called it8712f_wdt.		module will be called it8712f_wdt.

			config IT87_WDT
			tristate "IT87 Watchdog Timer"
			depends on X86 && EXPERIMENTAL
			---help---
			This is the driver for the hardware watchdog on the ITE IT8716,
			IT8718, IT8726, IT8712(Version J,K) Super I/O chips. This watchdog
			simply watches your kernel to make sure it doesn't freeze, and if
			it does, it reboots your computer after a certain amount of time.

			To compile this driver as a module, choose M here: the module will
			be called it87_wdt.

	config HP_WATCHDOG		config HP_WATCHDOG
	tristate "HP Proliant iLO 2 Hardware Watchdog Timer"		tristate "HP Proliant iLO 2 Hardware Watchdog Timer"
	depends on X86		depends on X86
	@@ -573,6 +601,21 @@ config W83697HF_WDT

	Most people will say N.		Most people will say N.

			config W83697UG_WDT
			tristate "W83697UG/W83697UF Watchdog Timer"
			depends on X86
			---help---
			This is the driver for the hardware watchdog on the W83697UG/UF
			chipset as used in MSI Fuzzy CX700 VIA motherboards (and likely others).
			This watchdog simply watches your kernel to make sure it doesn't
			freeze, and if it does, it reboots your computer after a certain
			amount of time.

			To compile this driver as a module, choose M here: the
			module will be called w83697ug_wdt.

			Most people will say N.

	config W83877F_WDT		config W83877F_WDT
	tristate "W83877F (EMACS) Watchdog Timer"		tristate "W83877F (EMACS) Watchdog Timer"
	depends on X86		depends on X86

drivers/watchdog/Makefile

+4 −0

drivers/watchdog/at91sam9_wdt.c

0 → 100644

+328 −0

Original line number	Original line	Diff line number	Diff line
			/*
			* Watchdog driver for Atmel AT91SAM9x processors.
			*
			* Copyright (C) 2008 Renaud CERRATO r.cerrato@til-technologies.fr
			*
			* This program is free software; you can redistribute it and/or
			* modify it under the terms of the GNU General Public License
			* as published by the Free Software Foundation; either version
			* 2 of the License, or (at your option) any later version.
			*/

			/*
			* The Watchdog Timer Mode Register can be only written to once. If the
			* timeout need to be set from Linux, be sure that the bootstrap or the
			* bootloader doesn't write to this register.
			*/

			#include <linux/errno.h>
			#include <linux/fs.h>
			#include <linux/init.h>
			#include <linux/kernel.h>
			#include <linux/miscdevice.h>
			#include <linux/module.h>
			#include <linux/moduleparam.h>
			#include <linux/platform_device.h>
			#include <linux/types.h>
			#include <linux/watchdog.h>
			#include <linux/jiffies.h>
			#include <linux/timer.h>
			#include <linux/bitops.h>
			#include <linux/uaccess.h>

			#include <asm/arch/at91_wdt.h>

			#define DRV_NAME "AT91SAM9 Watchdog"

			/* AT91SAM9 watchdog runs a 12bit counter @ 256Hz,
			* use this to convert a watchdog
			* value from/to milliseconds.
			*/
			#define ms_to_ticks(t) (((t << 8) / 1000) - 1)
			#define ticks_to_ms(t) (((t + 1) * 1000) >> 8)

			/* Hardware timeout in seconds */
			#define WDT_HW_TIMEOUT 2

			/* Timer heartbeat (500ms) */
			#define WDT_TIMEOUT (HZ/2)

			/* User land timeout */
			#define WDT_HEARTBEAT 15
			static int heartbeat = WDT_HEARTBEAT;
			module_param(heartbeat, int, 0);
			MODULE_PARM_DESC(heartbeat, "Watchdog heartbeats in seconds. "
			"(default = " __MODULE_STRING(WDT_HEARTBEAT) ")");

			static int nowayout = WATCHDOG_NOWAYOUT;
			module_param(nowayout, int, 0);
			MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
			"(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");

			static void at91_ping(unsigned long data);

			static struct {
			unsigned long next_heartbeat; /* the next_heartbeat for the timer */
			unsigned long open;
			char expect_close;
			struct timer_list timer; /* The timer that pings the watchdog */
			} at91wdt_private;

			/* ......................................................................... */


			/*
			* Reload the watchdog timer. (ie, pat the watchdog)
			*/
			static inline void at91_wdt_reset(void)
			{
			at91_sys_write(AT91_WDT_CR, AT91_WDT_KEY \| AT91_WDT_WDRSTT);
			}

			/*
			* Timer tick
			*/
			static void at91_ping(unsigned long data)
			{
			if (time_before(jiffies, at91wdt_private.next_heartbeat) \|\|
			(!nowayout && !at91wdt_private.open)) {
			at91_wdt_reset();
			mod_timer(&at91wdt_private.timer, jiffies + WDT_TIMEOUT);
			} else
			printk(KERN_CRIT DRV_NAME": I will reset your machine !\n");
			}

			/*
			* Watchdog device is opened, and watchdog starts running.
			*/
			static int at91_wdt_open(struct inode inode, struct file file)
			{
			if (test_and_set_bit(0, &at91wdt_private.open))
			return -EBUSY;

			at91wdt_private.next_heartbeat = jiffies + heartbeat * HZ;
			mod_timer(&at91wdt_private.timer, jiffies + WDT_TIMEOUT);

			return nonseekable_open(inode, file);
			}

			/*
			* Close the watchdog device.
			*/
			static int at91_wdt_close(struct inode inode, struct file file)
			{
			clear_bit(0, &at91wdt_private.open);

			/* stop internal ping */
			if (!at91wdt_private.expect_close)
			del_timer(&at91wdt_private.timer);

			at91wdt_private.expect_close = 0;
			return 0;
			}

			/*
			* Set the watchdog time interval in 1/256Hz (write-once)
			* Counter is 12 bit.
			*/
			static int at91_wdt_settimeout(unsigned int timeout)
			{
			unsigned int reg;
			unsigned int mr;

			/* Check if disabled */
			mr = at91_sys_read(AT91_WDT_MR);
			if (mr & AT91_WDT_WDDIS) {
			printk(KERN_ERR DRV_NAME": sorry, watchdog is disabled\n");
			return -EIO;
			}

			/*
			* All counting occurs at SLOW_CLOCK / 128 = 256 Hz
			*
			* Since WDV is a 12-bit counter, the maximum period is
			* 4096 / 256 = 16 seconds.
			*/
			reg = AT91_WDT_WDRSTEN /* causes watchdog reset */
			/* \| AT91_WDT_WDRPROC causes processor reset only */
			\| AT91_WDT_WDDBGHLT /* disabled in debug mode */
			\| AT91_WDT_WDD /* restart at any time */
			\| (timeout & AT91_WDT_WDV); /* timer value */
			at91_sys_write(AT91_WDT_MR, reg);

			return 0;
			}

			static const struct watchdog_info at91_wdt_info = {
			.identity = DRV_NAME,
			.options = WDIOF_SETTIMEOUT \| WDIOF_KEEPALIVEPING,
			};

			/*
			* Handle commands from user-space.
			*/
			static long at91_wdt_ioctl(struct file *file,
			unsigned int cmd, unsigned long arg)
			{
			void __user argp = (void __user )arg;
			int __user *p = argp;
			int new_value;

			switch (cmd) {
			case WDIOC_GETSUPPORT:
			return copy_to_user(argp, &at91_wdt_info,
			sizeof(at91_wdt_info)) ? -EFAULT : 0;

			case WDIOC_GETSTATUS:
			case WDIOC_GETBOOTSTATUS:
			return put_user(0, p);

			case WDIOC_KEEPALIVE:
			at91wdt_private.next_heartbeat = jiffies + heartbeat * HZ;
			return 0;

			case WDIOC_SETTIMEOUT:
			if (get_user(new_value, p))
			return -EFAULT;

			heartbeat = new_value;
			at91wdt_private.next_heartbeat = jiffies + heartbeat * HZ;

			return put_user(new_value, p); /* return current value */

			case WDIOC_GETTIMEOUT:
			return put_user(heartbeat, p);
			}
			return -ENOTTY;
			}

			/*
			* Pat the watchdog whenever device is written to.
			*/
			static ssize_t at91_wdt_write(struct file file, const char data, size_t len,
			loff_t *ppos)
			{
			if (!len)
			return 0;

			/* Scan for magic character */
			if (!nowayout) {
			size_t i;

			at91wdt_private.expect_close = 0;

			for (i = 0; i < len; i++) {
			char c;
			if (get_user(c, data + i))
			return -EFAULT;
			if (c == 'V') {
			at91wdt_private.expect_close = 42;
			break;
			}
			}
			}

			at91wdt_private.next_heartbeat = jiffies + heartbeat * HZ;

			return len;
			}

			/* ......................................................................... */

			static const struct file_operations at91wdt_fops = {
			.owner = THIS_MODULE,
			.llseek = no_llseek,
			.unlocked_ioctl = at91_wdt_ioctl,
			.open = at91_wdt_open,
			.release = at91_wdt_close,
			.write = at91_wdt_write,
			};

			static struct miscdevice at91wdt_miscdev = {
			.minor = WATCHDOG_MINOR,
			.name = "watchdog",
			.fops = &at91wdt_fops,
			};

			static int __init at91wdt_probe(struct platform_device *pdev)
			{
			int res;

			if (at91wdt_miscdev.parent)
			return -EBUSY;
			at91wdt_miscdev.parent = &pdev->dev;

			/* Set watchdog */
			res = at91_wdt_settimeout(ms_to_ticks(WDT_HW_TIMEOUT * 1000));
			if (res)
			return res;

			res = misc_register(&at91wdt_miscdev);
			if (res)
			return res;

			at91wdt_private.next_heartbeat = jiffies + heartbeat * HZ;
			setup_timer(&at91wdt_private.timer, at91_ping, 0);
			mod_timer(&at91wdt_private.timer, jiffies + WDT_TIMEOUT);

			printk(KERN_INFO DRV_NAME " enabled (heartbeat=%d sec, nowayout=%d)\n",
			heartbeat, nowayout);

			return 0;
			}

			static int __exit at91wdt_remove(struct platform_device *pdev)
			{
			int res;

			res = misc_deregister(&at91wdt_miscdev);
			if (!res)
			at91wdt_miscdev.parent = NULL;

			return res;
			}

			#ifdef CONFIG_PM

			static int at91wdt_suspend(struct platform_device *pdev, pm_message_t message)
			{
			return 0;
			}

			static int at91wdt_resume(struct platform_device *pdev)
			{
			return 0;
			}

			#else
			#define at91wdt_suspend NULL
			#define at91wdt_resume NULL
			#endif

			static struct platform_driver at91wdt_driver = {
			.remove = __exit_p(at91wdt_remove),
			.suspend = at91wdt_suspend,
			.resume = at91wdt_resume,
			.driver = {
			.name = "at91_wdt",
			.owner = THIS_MODULE,
			},
			};

			static int __init at91sam_wdt_init(void)
			{
			return platform_driver_probe(&at91wdt_driver, at91wdt_probe);
			}

			static void __exit at91sam_wdt_exit(void)
			{
			platform_driver_unregister(&at91wdt_driver);
			}

			module_init(at91sam_wdt_init);
			module_exit(at91sam_wdt_exit);

			MODULE_AUTHOR("Renaud CERRATO <r.cerrato@til-technologies.fr>");
			MODULE_DESCRIPTION("Watchdog driver for Atmel AT91SAM9x processors");
			MODULE_LICENSE("GPL");
			MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);

Original line number	Original line	Diff line number	Diff line
	@@ -26,6 +26,7 @@ obj-$(CONFIG_USBPCWATCHDOG) += pcwd_usb.o

	# ARM Architecture		# ARM Architecture
	obj-$(CONFIG_AT91RM9200_WATCHDOG) += at91rm9200_wdt.o		obj-$(CONFIG_AT91RM9200_WATCHDOG) += at91rm9200_wdt.o
			obj-$(CONFIG_AT91SAM9X_WATCHDOG) += at91sam9_wdt.o
	obj-$(CONFIG_OMAP_WATCHDOG) += omap_wdt.o		obj-$(CONFIG_OMAP_WATCHDOG) += omap_wdt.o
	obj-$(CONFIG_21285_WATCHDOG) += wdt285.o		obj-$(CONFIG_21285_WATCHDOG) += wdt285.o
	obj-$(CONFIG_977_WATCHDOG) += wdt977.o		obj-$(CONFIG_977_WATCHDOG) += wdt977.o
	@@ -39,6 +40,7 @@ obj-$(CONFIG_EP93XX_WATCHDOG) += ep93xx_wdt.o
	obj-$(CONFIG_PNX4008_WATCHDOG) += pnx4008_wdt.o		obj-$(CONFIG_PNX4008_WATCHDOG) += pnx4008_wdt.o
	obj-$(CONFIG_IOP_WATCHDOG) += iop_wdt.o		obj-$(CONFIG_IOP_WATCHDOG) += iop_wdt.o
	obj-$(CONFIG_DAVINCI_WATCHDOG) += davinci_wdt.o		obj-$(CONFIG_DAVINCI_WATCHDOG) += davinci_wdt.o
			obj-$(CONFIG_ORION5X_WATCHDOG) += orion5x_wdt.o

	# ARM26 Architecture		# ARM26 Architecture

	@@ -71,6 +73,7 @@ ifeq ($(CONFIG_ITCO_VENDOR_SUPPORT),y)
	obj-$(CONFIG_ITCO_WDT) += iTCO_vendor_support.o		obj-$(CONFIG_ITCO_WDT) += iTCO_vendor_support.o
	endif		endif
	obj-$(CONFIG_IT8712F_WDT) += it8712f_wdt.o		obj-$(CONFIG_IT8712F_WDT) += it8712f_wdt.o
			obj-$(CONFIG_IT87_WDT) += it87_wdt.o
	obj-$(CONFIG_HP_WATCHDOG) += hpwdt.o		obj-$(CONFIG_HP_WATCHDOG) += hpwdt.o
	obj-$(CONFIG_SC1200_WDT) += sc1200wdt.o		obj-$(CONFIG_SC1200_WDT) += sc1200wdt.o
	obj-$(CONFIG_SCx200_WDT) += scx200_wdt.o		obj-$(CONFIG_SCx200_WDT) += scx200_wdt.o
	@@ -83,6 +86,7 @@ obj-$(CONFIG_CPU5_WDT) += cpu5wdt.o
	obj-$(CONFIG_SMSC37B787_WDT) += smsc37b787_wdt.o		obj-$(CONFIG_SMSC37B787_WDT) += smsc37b787_wdt.o
	obj-$(CONFIG_W83627HF_WDT) += w83627hf_wdt.o		obj-$(CONFIG_W83627HF_WDT) += w83627hf_wdt.o
	obj-$(CONFIG_W83697HF_WDT) += w83697hf_wdt.o		obj-$(CONFIG_W83697HF_WDT) += w83697hf_wdt.o
			obj-$(CONFIG_W83697UG_WDT) += w83697ug_wdt.o
	obj-$(CONFIG_W83877F_WDT) += w83877f_wdt.o		obj-$(CONFIG_W83877F_WDT) += w83877f_wdt.o
	obj-$(CONFIG_W83977F_WDT) += w83977f_wdt.o		obj-$(CONFIG_W83977F_WDT) += w83977f_wdt.o
	obj-$(CONFIG_MACHZ_WDT) += machzwd.o		obj-$(CONFIG_MACHZ_WDT) += machzwd.o