Loading qcom/yupik.dtsi +3 −0 Original line number Diff line number Diff line Loading @@ -77,6 +77,7 @@ dynamic-power-coefficient = <100>; qcom,freq-domain = <&cpufreq_hw 0 4>; next-level-cache = <&L2_0>; #cooling-cells = <2>; L2_0: l2-cache { compatible = "arm,arch-cache"; cache-level = <2>; Loading Loading @@ -150,6 +151,7 @@ dynamic-power-coefficient = <520>; qcom,freq-domain = <&cpufreq_hw 1 4>; next-level-cache = <&L2_4>; #cooling-cells = <2>; L2_4: l2-cache { compatible = "arm,arch-cache"; cache-level = <2>; Loading Loading @@ -201,6 +203,7 @@ dynamic-power-coefficient = <552>; qcom,freq-domain = <&cpufreq_hw 2 4>; next-level-cache = <&L2_7>; #cooling-cells = <2>; L2_7: l2-cache { compatible = "arm,arch-cache"; cache-level = <2>; Loading Loading
qcom/yupik.dtsi +3 −0 Original line number Diff line number Diff line Loading @@ -77,6 +77,7 @@ dynamic-power-coefficient = <100>; qcom,freq-domain = <&cpufreq_hw 0 4>; next-level-cache = <&L2_0>; #cooling-cells = <2>; L2_0: l2-cache { compatible = "arm,arch-cache"; cache-level = <2>; Loading Loading @@ -150,6 +151,7 @@ dynamic-power-coefficient = <520>; qcom,freq-domain = <&cpufreq_hw 1 4>; next-level-cache = <&L2_4>; #cooling-cells = <2>; L2_4: l2-cache { compatible = "arm,arch-cache"; cache-level = <2>; Loading Loading @@ -201,6 +203,7 @@ dynamic-power-coefficient = <552>; qcom,freq-domain = <&cpufreq_hw 2 4>; next-level-cache = <&L2_7>; #cooling-cells = <2>; L2_7: l2-cache { compatible = "arm,arch-cache"; cache-level = <2>; Loading