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Commit 93e0daa0 authored by Michal Kazior's avatar Michal Kazior Committed by Kalle Valo
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ath10k: make sure to mask all CE irqs



CE error interrupts were not disabled. This could
lead to invalid memory accesses / memory
corruption.

Also make sure CE watermark interrupts are also
disabled.

Signed-off-by: default avatarMichal Kazior <michal.kazior@tieto.com>
Signed-off-by: default avatarKalle Valo <kvalo@qca.qualcomm.com>
parent d7fb47f5
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+12 −0
Original line number Original line Diff line number Diff line
@@ -243,6 +243,16 @@ static inline void ath10k_ce_error_intr_enable(struct ath10k *ar,
			   misc_ie_addr | CE_ERROR_MASK);
			   misc_ie_addr | CE_ERROR_MASK);
}
}


static inline void ath10k_ce_error_intr_disable(struct ath10k *ar,
						u32 ce_ctrl_addr)
{
	u32 misc_ie_addr = ath10k_pci_read32(ar,
					     ce_ctrl_addr + MISC_IE_ADDRESS);

	ath10k_pci_write32(ar, ce_ctrl_addr + MISC_IE_ADDRESS,
			   misc_ie_addr & ~CE_ERROR_MASK);
}

static inline void ath10k_ce_engine_int_status_clear(struct ath10k *ar,
static inline void ath10k_ce_engine_int_status_clear(struct ath10k *ar,
						     u32 ce_ctrl_addr,
						     u32 ce_ctrl_addr,
						     unsigned int mask)
						     unsigned int mask)
@@ -794,6 +804,8 @@ void ath10k_ce_disable_interrupts(struct ath10k *ar)
		u32 ctrl_addr = ath10k_ce_base_address(ce_id);
		u32 ctrl_addr = ath10k_ce_base_address(ce_id);


		ath10k_ce_copy_complete_intr_disable(ar, ctrl_addr);
		ath10k_ce_copy_complete_intr_disable(ar, ctrl_addr);
		ath10k_ce_error_intr_disable(ar, ctrl_addr);
		ath10k_ce_watermark_intr_disable(ar, ctrl_addr);
	}
	}
	ath10k_pci_sleep(ar);
	ath10k_pci_sleep(ar);
}
}