Loading drivers/gpu/drm/i915/i915_drv.h +0 −5 Original line number Diff line number Diff line Loading @@ -251,11 +251,6 @@ enum hpd_pin { &dev->mode_config.connector_list, \ base.head) #define for_each_digital_port(dev, digital_port) \ list_for_each_entry(digital_port, \ &dev->mode_config.encoder_list, \ base.base.head) #define for_each_encoder_on_crtc(dev, __crtc, intel_encoder) \ list_for_each_entry((intel_encoder), &(dev)->mode_config.encoder_list, base.head) \ if ((intel_encoder)->base.crtc == (__crtc)) Loading drivers/gpu/drm/i915/i915_gem_execbuffer.c +1 −5 Original line number Diff line number Diff line Loading @@ -1558,12 +1558,8 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data, * dispatch_execbuffer implementations. We specifically * don't want that set when the command parser is * enabled. * * FIXME: with aliasing ppgtt, buffers that should only * be in ggtt still end up in the aliasing ppgtt. remove * this check when that is fixed. */ if (USES_FULL_PPGTT(dev)) if (USES_PPGTT(dev)) dispatch_flags |= I915_DISPATCH_SECURE; exec_start = 0; Loading drivers/gpu/drm/i915/i915_gem_gtt.c +22 −17 Original line number Diff line number Diff line Loading @@ -1928,8 +1928,6 @@ static int ggtt_bind_vma(struct i915_vma *vma, vma->vm->insert_entries(vma->vm, pages, vma->node.start, cache_level, pte_flags); vma->bound |= GLOBAL_BIND; } if (dev_priv->mm.aliasing_ppgtt && flags & LOCAL_BIND) { Loading Loading @@ -2804,21 +2802,13 @@ i915_get_ggtt_vma_pages(struct i915_vma *vma) int i915_vma_bind(struct i915_vma *vma, enum i915_cache_level cache_level, u32 flags) { int ret = 0; u32 bind_flags = 0; if (vma->vm->allocate_va_range) { trace_i915_va_alloc(vma->vm, vma->node.start, vma->node.size, VM_TO_TRACE_NAME(vma->vm)); int ret; u32 bind_flags; ret = vma->vm->allocate_va_range(vma->vm, vma->node.start, vma->node.size); if (ret) return ret; } if (WARN_ON(flags == 0)) return -EINVAL; bind_flags = 0; if (flags & PIN_GLOBAL) bind_flags |= GLOBAL_BIND; if (flags & PIN_USER) Loading @@ -2829,7 +2819,22 @@ int i915_vma_bind(struct i915_vma *vma, enum i915_cache_level cache_level, else bind_flags &= ~vma->bound; if (bind_flags) if (bind_flags == 0) return 0; if (vma->bound == 0 && vma->vm->allocate_va_range) { trace_i915_va_alloc(vma->vm, vma->node.start, vma->node.size, VM_TO_TRACE_NAME(vma->vm)); ret = vma->vm->allocate_va_range(vma->vm, vma->node.start, vma->node.size); if (ret) return ret; } ret = vma->vm->bind_vma(vma, cache_level, bind_flags); if (ret) return ret; Loading drivers/gpu/drm/i915/intel_ddi.c +37 −19 Original line number Diff line number Diff line Loading @@ -210,29 +210,39 @@ static const struct bxt_ddi_buf_trans bxt_ddi_translations_hdmi[] = { { 154, 0x9A, 1, 128, true }, /* 9: 1200 0 */ }; enum port intel_ddi_get_encoder_port(struct intel_encoder *intel_encoder) static void ddi_get_encoder_port(struct intel_encoder *intel_encoder, struct intel_digital_port **dig_port, enum port *port) { struct drm_encoder *encoder = &intel_encoder->base; int type = intel_encoder->type; if (type == INTEL_OUTPUT_DP_MST) { struct intel_digital_port *intel_dig_port = enc_to_mst(encoder)->primary; return intel_dig_port->port; *dig_port = enc_to_mst(encoder)->primary; *port = (*dig_port)->port; } else if (type == INTEL_OUTPUT_DISPLAYPORT || type == INTEL_OUTPUT_EDP || type == INTEL_OUTPUT_HDMI || type == INTEL_OUTPUT_UNKNOWN) { struct intel_digital_port *intel_dig_port = enc_to_dig_port(encoder); return intel_dig_port->port; *dig_port = enc_to_dig_port(encoder); *port = (*dig_port)->port; } else if (type == INTEL_OUTPUT_ANALOG) { return PORT_E; *dig_port = NULL; *port = PORT_E; } else { DRM_ERROR("Invalid DDI encoder type %d\n", type); BUG(); } } enum port intel_ddi_get_encoder_port(struct intel_encoder *intel_encoder) { struct intel_digital_port *dig_port; enum port port; ddi_get_encoder_port(intel_encoder, &dig_port, &port); return port; } static bool intel_dig_port_supports_hdmi(const struct intel_digital_port *intel_dig_port) { Loading @@ -246,12 +256,11 @@ intel_dig_port_supports_hdmi(const struct intel_digital_port *intel_dig_port) * in either FDI or DP modes only, as HDMI connections will work with both * of those */ static void intel_prepare_ddi_buffers(struct drm_device *dev, struct intel_digital_port *intel_dig_port) static void intel_prepare_ddi_buffers(struct drm_device *dev, enum port port, bool supports_hdmi) { struct drm_i915_private *dev_priv = dev->dev_private; u32 reg; int port = intel_dig_port->port; int i, n_hdmi_entries, n_dp_entries, n_edp_entries, hdmi_default_entry, size; int hdmi_level = dev_priv->vbt.ddi_port_info[port].hdmi_level_shift; Loading @@ -262,7 +271,7 @@ static void intel_prepare_ddi_buffers(struct drm_device *dev, const struct ddi_buf_trans *ddi_translations; if (IS_BROXTON(dev)) { if (!intel_dig_port_supports_hdmi(intel_dig_port)) if (!supports_hdmi) return; /* Vswing programming for HDMI */ Loading Loading @@ -350,7 +359,7 @@ static void intel_prepare_ddi_buffers(struct drm_device *dev, reg += 4; } if (!intel_dig_port_supports_hdmi(intel_dig_port)) if (!supports_hdmi) return; /* Choose a good default if VBT is badly populated */ Loading @@ -370,18 +379,27 @@ static void intel_prepare_ddi_buffers(struct drm_device *dev, */ void intel_prepare_ddi(struct drm_device *dev) { struct intel_digital_port *intel_dig_port; struct intel_encoder *intel_encoder; bool visited[I915_MAX_PORTS] = { 0, }; if (!HAS_DDI(dev)) return; for_each_digital_port(dev, intel_dig_port) { if (visited[intel_dig_port->port]) for_each_intel_encoder(dev, intel_encoder) { struct intel_digital_port *intel_dig_port; enum port port; bool supports_hdmi; ddi_get_encoder_port(intel_encoder, &intel_dig_port, &port); if (visited[port]) continue; intel_prepare_ddi_buffers(dev, intel_dig_port); visited[intel_dig_port->port] = true; supports_hdmi = intel_dig_port && intel_dig_port_supports_hdmi(intel_dig_port); intel_prepare_ddi_buffers(dev, port, supports_hdmi); visited[port] = true; } } Loading drivers/gpu/drm/i915/intel_dvo.c +1 −1 Original line number Diff line number Diff line Loading @@ -496,7 +496,7 @@ void intel_dvo_init(struct drm_device *dev) int gpio; bool dvoinit; enum pipe pipe; uint32_t dpll[2]; uint32_t dpll[I915_MAX_PIPES]; /* Allow the I2C driver info to specify the GPIO to be used in * special cases, but otherwise default to what's defined Loading Loading
drivers/gpu/drm/i915/i915_drv.h +0 −5 Original line number Diff line number Diff line Loading @@ -251,11 +251,6 @@ enum hpd_pin { &dev->mode_config.connector_list, \ base.head) #define for_each_digital_port(dev, digital_port) \ list_for_each_entry(digital_port, \ &dev->mode_config.encoder_list, \ base.base.head) #define for_each_encoder_on_crtc(dev, __crtc, intel_encoder) \ list_for_each_entry((intel_encoder), &(dev)->mode_config.encoder_list, base.head) \ if ((intel_encoder)->base.crtc == (__crtc)) Loading
drivers/gpu/drm/i915/i915_gem_execbuffer.c +1 −5 Original line number Diff line number Diff line Loading @@ -1558,12 +1558,8 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data, * dispatch_execbuffer implementations. We specifically * don't want that set when the command parser is * enabled. * * FIXME: with aliasing ppgtt, buffers that should only * be in ggtt still end up in the aliasing ppgtt. remove * this check when that is fixed. */ if (USES_FULL_PPGTT(dev)) if (USES_PPGTT(dev)) dispatch_flags |= I915_DISPATCH_SECURE; exec_start = 0; Loading
drivers/gpu/drm/i915/i915_gem_gtt.c +22 −17 Original line number Diff line number Diff line Loading @@ -1928,8 +1928,6 @@ static int ggtt_bind_vma(struct i915_vma *vma, vma->vm->insert_entries(vma->vm, pages, vma->node.start, cache_level, pte_flags); vma->bound |= GLOBAL_BIND; } if (dev_priv->mm.aliasing_ppgtt && flags & LOCAL_BIND) { Loading Loading @@ -2804,21 +2802,13 @@ i915_get_ggtt_vma_pages(struct i915_vma *vma) int i915_vma_bind(struct i915_vma *vma, enum i915_cache_level cache_level, u32 flags) { int ret = 0; u32 bind_flags = 0; if (vma->vm->allocate_va_range) { trace_i915_va_alloc(vma->vm, vma->node.start, vma->node.size, VM_TO_TRACE_NAME(vma->vm)); int ret; u32 bind_flags; ret = vma->vm->allocate_va_range(vma->vm, vma->node.start, vma->node.size); if (ret) return ret; } if (WARN_ON(flags == 0)) return -EINVAL; bind_flags = 0; if (flags & PIN_GLOBAL) bind_flags |= GLOBAL_BIND; if (flags & PIN_USER) Loading @@ -2829,7 +2819,22 @@ int i915_vma_bind(struct i915_vma *vma, enum i915_cache_level cache_level, else bind_flags &= ~vma->bound; if (bind_flags) if (bind_flags == 0) return 0; if (vma->bound == 0 && vma->vm->allocate_va_range) { trace_i915_va_alloc(vma->vm, vma->node.start, vma->node.size, VM_TO_TRACE_NAME(vma->vm)); ret = vma->vm->allocate_va_range(vma->vm, vma->node.start, vma->node.size); if (ret) return ret; } ret = vma->vm->bind_vma(vma, cache_level, bind_flags); if (ret) return ret; Loading
drivers/gpu/drm/i915/intel_ddi.c +37 −19 Original line number Diff line number Diff line Loading @@ -210,29 +210,39 @@ static const struct bxt_ddi_buf_trans bxt_ddi_translations_hdmi[] = { { 154, 0x9A, 1, 128, true }, /* 9: 1200 0 */ }; enum port intel_ddi_get_encoder_port(struct intel_encoder *intel_encoder) static void ddi_get_encoder_port(struct intel_encoder *intel_encoder, struct intel_digital_port **dig_port, enum port *port) { struct drm_encoder *encoder = &intel_encoder->base; int type = intel_encoder->type; if (type == INTEL_OUTPUT_DP_MST) { struct intel_digital_port *intel_dig_port = enc_to_mst(encoder)->primary; return intel_dig_port->port; *dig_port = enc_to_mst(encoder)->primary; *port = (*dig_port)->port; } else if (type == INTEL_OUTPUT_DISPLAYPORT || type == INTEL_OUTPUT_EDP || type == INTEL_OUTPUT_HDMI || type == INTEL_OUTPUT_UNKNOWN) { struct intel_digital_port *intel_dig_port = enc_to_dig_port(encoder); return intel_dig_port->port; *dig_port = enc_to_dig_port(encoder); *port = (*dig_port)->port; } else if (type == INTEL_OUTPUT_ANALOG) { return PORT_E; *dig_port = NULL; *port = PORT_E; } else { DRM_ERROR("Invalid DDI encoder type %d\n", type); BUG(); } } enum port intel_ddi_get_encoder_port(struct intel_encoder *intel_encoder) { struct intel_digital_port *dig_port; enum port port; ddi_get_encoder_port(intel_encoder, &dig_port, &port); return port; } static bool intel_dig_port_supports_hdmi(const struct intel_digital_port *intel_dig_port) { Loading @@ -246,12 +256,11 @@ intel_dig_port_supports_hdmi(const struct intel_digital_port *intel_dig_port) * in either FDI or DP modes only, as HDMI connections will work with both * of those */ static void intel_prepare_ddi_buffers(struct drm_device *dev, struct intel_digital_port *intel_dig_port) static void intel_prepare_ddi_buffers(struct drm_device *dev, enum port port, bool supports_hdmi) { struct drm_i915_private *dev_priv = dev->dev_private; u32 reg; int port = intel_dig_port->port; int i, n_hdmi_entries, n_dp_entries, n_edp_entries, hdmi_default_entry, size; int hdmi_level = dev_priv->vbt.ddi_port_info[port].hdmi_level_shift; Loading @@ -262,7 +271,7 @@ static void intel_prepare_ddi_buffers(struct drm_device *dev, const struct ddi_buf_trans *ddi_translations; if (IS_BROXTON(dev)) { if (!intel_dig_port_supports_hdmi(intel_dig_port)) if (!supports_hdmi) return; /* Vswing programming for HDMI */ Loading Loading @@ -350,7 +359,7 @@ static void intel_prepare_ddi_buffers(struct drm_device *dev, reg += 4; } if (!intel_dig_port_supports_hdmi(intel_dig_port)) if (!supports_hdmi) return; /* Choose a good default if VBT is badly populated */ Loading @@ -370,18 +379,27 @@ static void intel_prepare_ddi_buffers(struct drm_device *dev, */ void intel_prepare_ddi(struct drm_device *dev) { struct intel_digital_port *intel_dig_port; struct intel_encoder *intel_encoder; bool visited[I915_MAX_PORTS] = { 0, }; if (!HAS_DDI(dev)) return; for_each_digital_port(dev, intel_dig_port) { if (visited[intel_dig_port->port]) for_each_intel_encoder(dev, intel_encoder) { struct intel_digital_port *intel_dig_port; enum port port; bool supports_hdmi; ddi_get_encoder_port(intel_encoder, &intel_dig_port, &port); if (visited[port]) continue; intel_prepare_ddi_buffers(dev, intel_dig_port); visited[intel_dig_port->port] = true; supports_hdmi = intel_dig_port && intel_dig_port_supports_hdmi(intel_dig_port); intel_prepare_ddi_buffers(dev, port, supports_hdmi); visited[port] = true; } } Loading
drivers/gpu/drm/i915/intel_dvo.c +1 −1 Original line number Diff line number Diff line Loading @@ -496,7 +496,7 @@ void intel_dvo_init(struct drm_device *dev) int gpio; bool dvoinit; enum pipe pipe; uint32_t dpll[2]; uint32_t dpll[I915_MAX_PIPES]; /* Allow the I2C driver info to specify the GPIO to be used in * special cases, but otherwise default to what's defined Loading