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Commit 92f850ec authored by Hariprasad S's avatar Hariprasad S Committed by Doug Ledford
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RDMA/iw_cxgb4: set the correct FID value in DSGL commands 



The FID value in a ULP_MEMIO command needs to be set to an IQ ID of
a queue configured for our PF.  The FID/IQ id is used to index into the
PCIE FID table, to find out on which function the DMA needs to be
issued. Essentially, every DMA needs to have the ingress queue. The exact
ingress queue doesn't matter, but it needs to be an ingress queue
associated with the function you want to see the DMA on.

Signed-off-by: default avatarSteve Wise <swise@opengridcomputing.com>
Signed-off-by: default avatarHariprasad Shenai <hariprasad@chelsio.com>
Signed-off-by: default avatarDoug Ledford <dledford@redhat.com>
parent ccd2c30b

drivers/infiniband/hw/cxgb4/mem.c

+3 −2
Original line number Diff line number Diff line
@@ -86,8 +86,9 @@ static int _c4iw_write_mem_dma_aligned(struct c4iw_rdev *rdev, u32 addr, 
			(wait ? FW_WR_COMPL_F : 0));

	req->wr.wr_lo = wait ? (__force __be64)(unsigned long) &wr_wait : 0L;

	req->wr.wr_mid = cpu_to_be32(FW_WR_LEN16_V(DIV_ROUND_UP(wr_len, 16)));

	req->cmd = cpu_to_be32(ULPTX_CMD_V(ULP_TX_MEM_WRITE));

	req->cmd |= cpu_to_be32(T5_ULP_MEMIO_ORDER_V(1));

	req->cmd = cpu_to_be32(ULPTX_CMD_V(ULP_TX_MEM_WRITE) |

			       T5_ULP_MEMIO_ORDER_V(1) |

			       T5_ULP_MEMIO_FID_V(rdev->lldi.rxq_ids[0]));

	req->dlen = cpu_to_be32(ULP_MEMIO_DATA_LEN_V(len>>5));

	req->len16 = cpu_to_be32(DIV_ROUND_UP(wr_len-sizeof(req->wr), 16));

	req->lock_addr = cpu_to_be32(ULP_MEMIO_ADDR_V(addr));

drivers/net/ethernet/chelsio/cxgb4/t4_msg.h

+4 −0
Original line number Diff line number Diff line
@@ -1392,6 +1392,10 @@ struct ulp_mem_io { 
#define T5_ULP_MEMIO_ORDER_V(x) ((x) << T5_ULP_MEMIO_ORDER_S)

#define T5_ULP_MEMIO_ORDER_F    T5_ULP_MEMIO_ORDER_V(1U)



#define T5_ULP_MEMIO_FID_S	4

#define T5_ULP_MEMIO_FID_M	0x7ff

#define T5_ULP_MEMIO_FID_V(x)	((x) << T5_ULP_MEMIO_FID_S)



/* ulp_mem_io.lock_addr fields */

#define ULP_MEMIO_ADDR_S    0

#define ULP_MEMIO_ADDR_V(x) ((x) << ULP_MEMIO_ADDR_S)