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Commit 92e5d4e9 authored by Gregory CLEMENT's avatar Gregory CLEMENT
Browse files

arm64: dts: marvell: Add node labels for the cpus 



Aligned with what we have done for the others nodes. It will also allow
to easily modify the cpu configuration at board (or sub-SoC) level.

Signed-off-by: default avatarGregory CLEMENT <gregory.clement@bootlin.com>
parent 620cfb31

arch/arm64/boot/dts/marvell/armada-372x.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -16,7 +16,7 @@ 
	compatible = "marvell,armada3720", "marvell,armada3710";



	cpus {

		cpu@1 {

		cpu1: cpu@1 {

			device_type = "cpu";

			compatible = "arm,cortex-a53","arm,armv8";

			reg = <0x1>;

arch/arm64/boot/dts/marvell/armada-37xx.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -40,7 +40,7 @@ 
	cpus {

		#address-cells = <1>;

		#size-cells = <0>;

		cpu@0 {

		cpu0: cpu@0 {

			device_type = "cpu";

			compatible = "arm,cortex-a53", "arm,armv8";

			reg = <0>;

arch/arm64/boot/dts/marvell/armada-ap806-dual.dtsi

+2 −2
Original line number Diff line number Diff line
@@ -15,13 +15,13 @@ 
		#address-cells = <1>;

		#size-cells = <0>;



		cpu@0 {

		cpu0: cpu@0 {

			device_type = "cpu";

			compatible = "arm,cortex-a72", "arm,armv8";

			reg = <0x000>;

			enable-method = "psci";

		};

		cpu@1 {

		cpu1: cpu@1 {

			device_type = "cpu";

			compatible = "arm,cortex-a72", "arm,armv8";

			reg = <0x001>;

arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi

+4 −4
Original line number Diff line number Diff line
@@ -15,25 +15,25 @@ 
		#address-cells = <1>;

		#size-cells = <0>;



		cpu@0 {

		cpu0: cpu@0 {

			device_type = "cpu";

			compatible = "arm,cortex-a72", "arm,armv8";

			reg = <0x000>;

			enable-method = "psci";

		};

		cpu@1 {

		cpu1: cpu@1 {

			device_type = "cpu";

			compatible = "arm,cortex-a72", "arm,armv8";

			reg = <0x001>;

			enable-method = "psci";

		};

		cpu@100 {

		cpu2: cpu@100 {

			device_type = "cpu";

			compatible = "arm,cortex-a72", "arm,armv8";

			reg = <0x100>;

			enable-method = "psci";

		};

		cpu@101 {

		cpu3: cpu@101 {

			device_type = "cpu";

			compatible = "arm,cortex-a72", "arm,armv8";

			reg = <0x101>;

arch/arm64/boot/dts/marvell/armada-ap810-ap0-octa-core.dtsi

+8 −8
Original line number Diff line number Diff line
@@ -13,49 +13,49 @@ 
		#size-cells = <0>;

		compatible = "marvell,armada-ap810-octa";



		cpu@0 {

		cpu0: cpu@0 {

			device_type = "cpu";

			compatible = "arm,cortex-a72", "arm,armv8";

			reg = <0x000>;

			enable-method = "psci";

		};

		cpu@1 {

		cpu1: cpu@1 {

			device_type = "cpu";

			compatible = "arm,cortex-a72", "arm,armv8";

			reg = <0x001>;

			enable-method = "psci";

		};

		cpu@100 {

		cpu2: cpu@100 {

			device_type = "cpu";

			compatible = "arm,cortex-a72", "arm,armv8";

			reg = <0x100>;

			enable-method = "psci";

		};

		cpu@101 {

		cpu3: cpu@101 {

			device_type = "cpu";

			compatible = "arm,cortex-a72", "arm,armv8";

			reg = <0x101>;

			enable-method = "psci";

		};

		cpu@200 {

		cpu4: cpu@200 {

			device_type = "cpu";

			compatible = "arm,cortex-a72", "arm,armv8";

			reg = <0x200>;

			enable-method = "psci";

		};

		cpu@201 {

		cpu5: cpu@201 {

			device_type = "cpu";

			compatible = "arm,cortex-a72", "arm,armv8";

			reg = <0x201>;

			enable-method = "psci";

		};

		cpu@300 {

		cpu6: cpu@300 {

			device_type = "cpu";

			compatible = "arm,cortex-a72", "arm,armv8";

			reg = <0x300>;

			enable-method = "psci";

		};

		cpu@301 {

		cpu7: cpu@301 {

			device_type = "cpu";

			compatible = "arm,cortex-a72", "arm,armv8";

			reg = <0x301>;